UVM jobs
UVM: the standard way to test chip designs before they are made. Astera Labs, Tenstorrent, SpaceX, Astranis and Anduril Industries have the most open roles mentioning UVM right now.
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106 open roles · 7 posted in the last 7 days · 2% remote · 26 companies hiring · $208K median advertised salary · checked Nov 15 against employer career pages
Job titles in UVM roles
Bars show the share of these 106 roles; one role can count in several rows.
Newest UVM jobs
- Principal Design Verifiction EngineerSambaNova · 🇺🇸San Jose, California, United States$180K - $225KLead and abovePythonC++Machine Learning
- Senior FPGA Verification EngineerAnduril Industries · 🇺🇸Waltham, Massachusetts, United States · +2 more locations$191K - $254KSeniorPythonC++Linux
- Senior ASIC Design Verification EngineerK2 Space · 🇺🇸United States - Remote · +1 more location$170K - $250KRemoteSeniorPythonC++CI/CD
- Principal ASIC Design Verification EngineerK2 Space · 🇺🇸United States - Remote · +1 more location$190K - $285KRemoteLead and abovePythonC++CI/CD
- Senior Hardware Design EngineerArago · 🇫🇷Paris Offices—HybridSeniorMachine LearningVerilogFrench
- Principal Design Verification Engineer (AI Fabric Switches)Astera Labs · 🇺🇸San Jose, California, United States$185K - $240KLead and abovePythonC++AI
- Validation and Verification Engineer, Aviation EngineeringSkyryse · 🇺🇸El Segundo, CA$120K - $145KPythonC++MATLAB
- DFT EngineerTenstorrent · 🇺🇸Austin, Texas, United States; Fort Collins, Colorado, Uni…—VerilogHardware interfacesCompilers
- FPGA EngineerTomorrow.io · 🇺🇸Golden, Colorado, United States—VerilogGenerative AITest planning
- Principal Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$185K - $240KLead and abovePythonFirmwareHardware interfaces
- Senior FPGA Engineer IIRocket Lab · 🇺🇸Long Beach, CA$143K - $215KSeniorJiraGitControl systems
- Principal PCS/PMA RTL Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$185K - $240KLead and abovePythonVerilogPerl
- Technical Lead Digital Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KLead and abovePythonVerilogTest planning
- Senior Design Verification Engineer, AI HardwareTenstorrent · 🇷🇸Belgrade, Serbia—SeniorAIVerilogFirmware
- Staff Design Verification Engineer, AI HardwareTenstorrent · 🇷🇸Belgrade, Serbia—Lead and aboveAIFirmwareCompilers
- Design Verification Engineer, New GradSambaNova · 🇺🇸San Jose, California, United States$120K - $150KJuniorPythonVerilogPerl
- Junior Emulation EngineerCelero Communications, Inc. · 🇦🇷Cordoba, Argentina—JuniorPythonLinuxVerilog
- Principal Design Verification Engineer- SerDes/PHY IPAstera Labs · 🇺🇸San Jose, California, United States$207K - $230KLead and abovePythonVerilogPerl
- Senior Design Verification EngineerAstera Labs · 🇺🇸San Jose, California, United States · +3 more locations$148K - $165KSeniorPythonVerilogPerl
- Principal Verification EngineerAstera Labs · 🇺🇸San Jose, California, United States · +1 more location$185K - $230KLead and abovePythonC++Verilog
- Senior Digital ASIC Design Engineer - DSP/Analog/SerDesCelero Communications, Inc. · 🇨🇦Ottawa, Ontario, Canada · +2 more locations—SeniorPythonMATLABVerilog
- Research Engineer, Chip Design RLAnthropic · 🇺🇸San Francisco, CA$500K - $850KLLMReinforcement learningASIC
- Tech Lead Analog Mixed-Signal IC Layout EngineerAstera Labs · 🇸🇬Singapore, Singapore—Lead and abovePythonC++Verilog
- Senior Analog Mixed-Signal IC Layout EngineerAstera Labs · 🇸🇬Singapore, Singapore—SeniorPythonC++Verilog
- Tech Lead, Digital Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$176K - $195KLead and abovePythonHardware interfacesASIC
- Silicon Emulation EngineerWaymo · 🇹🇼Taipei, Taiwan; Hsinchu, Taiwan · +1 more location—PythonC++Linux
- Design Verification Emulation, HardwareRiver AI Inc. · 🇺🇸Austin, TX, Palo Alto, CA$200K - $420KPythonC++CI/CD
- Tech Lead Engineer, Design VerificationAstera Labs · 🇺🇸San Jose, California, United States$176K - $195KLead and abovePythonVerilogPowerShell
- FPGA Associate (Winter 2027)Astranis · 🇺🇸San Francisco—VerilogFPGARTL design
- FPGA Associate (Summer 2027)Astranis · 🇺🇸San Francisco—VerilogFPGARTL design
- FPGA Intern (Summer 2027)Astranis · 🇺🇸San Francisco—InternVerilogFPGARTL design
- FPGA Intern (Winter 2027)Astranis · 🇺🇸San Francisco—InternVerilogFPGARTL design
- Design Verification Tech Lead- SerDes/PHY IPAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KLead and abovePythonVerilogPerl
- Midcore Design Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
- Front End Design Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
- Manager Design VerificationAstera Labs · 🇮🇱Tel Aviv-Yafo, Tel Aviv District, Israel—VerilogFirmwareHardware interfaces
- Principal Emulation EngineerAstera Labs · 🇺🇸San Jose, California, United States$207K - $230KLead and abovePythonVerilogPerl
- CPU Core Design Verification ManagerTenstorrent · 🇮🇳Bengaluru, Karnataka, India—Performance managementCompilersASIC
- FPGA EngineerEpirus · 🇺🇸Torrance, California, United States$124K - $144KPythonAgileMATLAB
- Sr. Staff Engineer, CPU (Front-End) VerificationTenstorrent · 🇺🇸Austin, Texas, United States; Santa Clara, California, Un…—Lead and aboveC++VerilogCompilers
- Senior FPGA Verification Engineer, Air Dominance and StrikeAnduril Industries · 🇺🇸Costa Mesa, California, United States$166K - $220KSeniorPythonLinuxCI/CD
- Mixed-signal Verification EngineerArago · 🇫🇷Paris Offices—PythonVerilogmacOS
- Staff Silicon Verification EngineerGraphcore · 🇮🇳Bengaluru, India—Lead and abovePythonJavaScriptC++
- Senior Silicon Verification EngineerGraphcore · 🇮🇳Bengaluru, India—SeniorPythonJavaScriptC++
- Principal Design Verification EngineerAstera Labs · 🇮🇳Bengaluru, Karnataka, India—Lead and aboveTest planningControl systemsHardware interfaces
- Tech Lead– Verification Methodology/CADAstera Labs · 🇮🇳Bengaluru, Karnataka, India—Lead and abovePythonC++Linux
- Senior FPGA Verification EngineerIonQ · 🇬🇧Oxford, England, United Kingdom—SeniorPythonVerilogFinancial modeling
- AMS Verification Engineer (RFIC Engineering)SpaceX · 🇺🇸Irvine, CA · +1 more location$125K - $160KPythonVerilogFirmware
- FPGA Verification Engineer, Air Dominance and StrikeAnduril Industries · 🇺🇸Costa Mesa, California, United States$146K - $194KPythonLinuxCI/CD
- Director of ASIC Design VerificationSambaNova · 🇺🇸San Jose, California, United States$270K - $340KLead and abovePythonMachine LearningVerilog
- Design Verification EngineerSambaNova · 🇺🇸San Jose, California, United States$120K - $200KPythonMachine LearningVerilog
- Staff Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$225K - $270KLead and abovePython.NETVerilog
- Senior Staff Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$250K - $300KLead and abovePython.NETVerilog
- Verification Engineer - Onsite PA or CA (6269)itD Tech · 🇺🇸Allentown, PA or Carlsbad, CA—PythonVerilogPerl
- Sr. ASIC Design Verification Engineer (Silicon Engineering)SpaceX · 🇺🇸Austin, TX · +3 more locations—SeniorPythonTest planningFirmware
- Design Verification Engineer (Silicon Engineering)SpaceX · 🇺🇸Redmond, WA · +3 more locations$125K - $145KPythonMATLABVerilog
- Silicon Verification Engineer - Multiple LevelsGraphcore · 🇬🇧Bristol, UK; Cambridge, UK; London, UK—PythonVerilogGit
- Soc Design Verification DirectorAstera Labs · 🇮🇳Bengaluru, Karnataka, India—Lead and aboveTest planningFirmwareHigh-performance computing
- ASIC Design Verification EngineerWaymo · 🇺🇸Mountain View, CA, USA$175K - $215KPythonC++LLM
- Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$190K - $230KPython.NETVerilog
- AI Core DV EngineerDensityAI · 🇺🇸Mountain View, CA; Austin, TX$180K - $275KPythonC++AI
- Staff/ Principal Design Verification EngineerAstera Labs · 🇮🇱Tel Aviv-Yafo, Tel Aviv District, Israel—Lead and abovePythonVerilogHardware interfaces
- CPU Verification Fellow, RISC-V High-Performance ProcessorTenstorrent · 🇺🇸Austin, Texas, United States; Santa Clara, California, Un…—VerilogTest planningFirmware
- System IP RTL Design LeadTenstorrent · 🇮🇳Bengaluru, Karnataka, India—Lead and abovePythonVerilogFirmware
- Sr/Staff Engineer, Design Verification,System IPTenstorrent · 🇮🇳Bengaluru, Karnataka, India—Lead and abovePythonBashVerilog
- CPU Core Design Verification Testbench LeadTenstorrent · 🇺🇸Austin, Texas, United States; Santa Clara, California, Un…—Lead and abovePythonC++C
- Staff Engineer, CPU Core VerificationTenstorrent · 🇮🇳Bengaluru, Karnataka, India—Lead and aboveC++CCompilers
- Design Verification EngineerDensityAI · 🇺🇸Mountain View, CA$200K - $300KASICComputer architectureUVM
- Design Verification Engineer, HardwareRiver AI Inc. · 🇺🇸Palo Alto, CA; Austin, TX$200K - $420KPythonCI/CDBash
- Senior FPGA EngineerEpirus · 🇺🇸Torrance, California, United States$143K - $176KSeniorPythonLinuxMATLAB
- Senior Emulation EngineerEnCharge AI · 🇮🇳India—SeniorPythonC++Verilog
- Senior/ Staff Formal Verification EngineerAstera Labs · 🇮🇱Tel Aviv-Yafo, Tel Aviv District, Israel—Lead and aboveVerilogHardware interfacesRTL design
- ASIC EngineerFalcomm · 🇺🇸Atlanta, Georgia, United States—PythonVerilogAnalog design
- IP Design Verification DirectorAstera Labs · 🇮🇳Bengaluru, Karnataka, India—Lead and aboveTest planningHardware interfacesRTL design
- Design Verification Engineer, Automotive RoboticsTenstorrent · 🇩🇪Munich, Germany—VerilogCompilersASIC
- Principal Digital Design Engineer (AI Fabric)Astera Labs · 🇺🇸San Jose, CA$185K - $230KLead and aboveAITest planningFirmware
- Director, Silicon VerificationGraphcore · 🇬🇧Bristol, UK—Lead and abovePythonJavaScriptC++
- Staff/Sr. Staff Design VerificationLightmatter · 🇺🇸Boston, MA · +1 more location$206K - $236KLead and abovePythonVerilogData centers
- Principal Silicon Verification EngineerGraphcore · 🇮🇳Bengaluru, India—Lead and abovePythonJavaScriptC++
- Staff/Sr. Staff Design Verification EngineerLightmatter · 🇨🇦Toronto, ONCA$203K - CA$224KLead and abovePythonVerilogData centers
- Design Verification EngineerOpenAI · 🇺🇸San Francisco$226K - $445KHybridVerilogHardware testingComputer architecture
- Digital Verification EngineerArago · 🇫🇷Paris Offices—Machine LearningVerilogFrench
- Design Verification Lead, AI HardwareTenstorrent · 🇨🇦Toronto, Ontario, Canada—Lead and aboveAIVerilogGenerative AI
- Emulation Software EngineerEtched · 🇺🇸Cupertino, CA—PythonC++Linux
- Sr Staff Engineer, SoC RTL DesignTenstorrent · 🇨🇦Toronto, Ontario, Canada—Lead and aboveVerilogGenerative AIFirmware
- Senior FPGA EngineerAstranis · 🇺🇸San Francisco$170K - $260KSeniorC++VerilogC
- FPGA EngineerAstranis · 🇺🇸San Francisco$115K - $180KVerilogFirmwareFPGA
Who is hiring for UVM roles
Where UVM roles are
- 🇺🇸United States72
- 🇺🇸California58
- 🇺🇸San Francisco Bay Area45
- 🌏Asia-Pacific15
- 🇮🇳India12
- 🇪🇺Europe11
- 🇮🇳Bangalore11
- 🇺🇸Austin, TX9
- 🇺🇸Texas9
- 🇨🇦Canada5
A role that lists several places is counted in each of them.
What UVM roles pay, by level
| Level in the title | Median advertised salary | Roles counted |
|---|---|---|
| No level in the title | $170K | 19 |
| Senior | $205K | 16 |
| Lead and above | $212K | 20 |
Medians of the midpoints of advertised yearly US-dollar ranges; a level needs at least 15 such roles. Advertised, not verified pay.
Jobs you can get with UVM
| Kind of work | Open jobs asking for UVM | Median advertised pay |
|---|---|---|
| Hardware engineer | 88 | $210K |
| Design verification engineer | 74 | $210K |
| Test and validation engineer | 54 | $210K |
| ASIC and chip design engineer | 24 | $211K |
| FPGA engineer | 16 | $186K |
| Analog and mixed-signal engineer | 10 | $190K |
| Tech lead and team lead | 6 | – |
Skills asked together with UVM
Verilog (84%), RTL design (81%), SystemVerilog (81%), ASIC (77%), Python (73%), Firmware (50%), Hardware interfaces (42%), Test planning (32%) of the 106 open postings that name UVM.
Companies hiring for UVM
UVM salariesQuestions about UVM jobs
- What is UVM?
- The standard way to test chip designs before they are made. 106 open roles on Jobs Every Hour ask for it as of Nov 15, 2026.
- How many UVM jobs are open right now?
- There are 106 open UVM jobs at 26 companies on Jobs Every Hour as of Nov 15, 2026. 7 of them were posted in the last seven days. The list is rebuilt every hour from the employers' own careers pages.
- Which companies have the most UVM jobs?
- Right now the most openings are at Astera Labs (25), Tenstorrent (15), SpaceX (10), Astranis (6) and Anduril Industries (5). The ranking changes as companies open and close roles.
- Are there remote UVM jobs?
- 2 of the 106 open UVM jobs (2%) are listed as remote. Remote roles are often limited to certain countries or time zones, so check the location line of each job.
- What do UVM jobs pay?
- The median advertised salary is $208K, based on 56 open roles that publish a yearly US-dollar range. The middle half of those roles advertise between $179K and $222K. These are advertised ranges, not verified pay. Most employers here are technology companies, so the figures run above the wider market for the same work.
- Is it hard to get a UVM job?
- 4 of the 106 open UVM jobs (4%) are for beginners: junior roles and internships. Of the 77 postings that state experience, the median asks for 5 years. 26 companies are hiring and 7 roles were posted in the last seven days. Matching your resume to the skills each posting names helps most; the free resume builder shows the match.
- How is AI changing UVM jobs?
- 18 of the 106 open UVM jobs (17%) ask for AI or machine-learning skills, most often AI, Machine Learning, Computer Vision. Employers still list 106 such roles today at 26 companies. Counted from the postings' own text on Nov 15, 2026.
- What skills do UVM jobs ask for?
- Most often UVM (100%), Verilog (84%), SystemVerilog (81%), RTL design (81%), ASIC (77%) of the 106 open postings, counted from their own text on Nov 15, 2026.
- Which job titles come up most in UVM jobs?
- Design Verification Engineer (11), Senior FPGA Verification Engineer (5), Senior Design Verification Engineer (5), Sr. ASIC Design Verification Engineer (4), Principal Design Verification Engineer (3): the most common titles among the 106 open roles, without the level and place notes in brackets.
- Are UVM jobs in demand in 2026?
- 106 UVM jobs are open on Jobs Every Hour today at 26 companies, 0.1% of all 148,162 open jobs here; 7 were posted in the last seven days. The median advertised salary is $208K. 2 (2%) can be done remotely.
- How do I apply for UVM jobs?
- Open a job and press “Apply on company site”. You go straight to the employer's own careers page and apply there. Jobs Every Hour needs no account and charges nothing for applying.



















