🇺🇸UVM jobs in California
58 open roles mentioning UVM in California as of Nov 15, 2026. Astera Labs, Tenstorrent, Astranis, SpaceX and SambaNova have the most. The median advertised salary is $205K.
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Skills asked for in UVM roles in California
Job titles in UVM roles in California
Bars show the share of these 58 roles; one role can count in several rows.
- Principal Design Verifiction EngineerSambaNova · 🇺🇸San Jose, California, United States$180K - $225KLead and abovePythonC++Machine Learning
- Senior FPGA Verification EngineerAnduril Industries · 🇺🇸Goleta, California, United States$191K - $254KSeniorPythonC++Linux
- Principal Design Verification Engineer (AI Fabric Switches)Astera Labs · 🇺🇸San Jose, California, United States$185K - $240KLead and abovePythonC++AI
- Validation and Verification Engineer, Aviation EngineeringSkyryse · 🇺🇸El Segundo, CA$120K - $145KPythonC++MATLAB
- DFT EngineerTenstorrent · 🇺🇸Austin, Texas, United States; Fort Collins, Colorado, Uni…—VerilogHardware interfacesCompilers
- Principal Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$185K - $240KLead and abovePythonFirmwareHardware interfaces
- Senior FPGA Engineer IIRocket Lab · 🇺🇸Long Beach, CA$143K - $215KSeniorJiraGitControl systems
- Principal PCS/PMA RTL Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$185K - $240KLead and abovePythonVerilogPerl
- Technical Lead Digital Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KLead and abovePythonVerilogTest planning
- Design Verification Engineer, New GradSambaNova · 🇺🇸San Jose, California, United States$120K - $150KJuniorPythonVerilogPerl
- Principal Design Verification Engineer- SerDes/PHY IPAstera Labs · 🇺🇸San Jose, California, United States$207K - $230KLead and abovePythonVerilogPerl
- Senior Design Verification EngineerAstera Labs · 🇺🇸San Jose, California, United States · +1 more location$148K - $165KSeniorPythonVerilogPerl
- Principal Verification EngineerAstera Labs · 🇺🇸San Jose, California, United States · +1 more location$185K - $230KLead and abovePythonC++Verilog
- Senior Digital ASIC Design Engineer - DSP/Analog/SerDesCelero Communications, Inc. · 🇺🇸Irvine, CA · +1 more location$150K - $250KSeniorPythonMATLABVerilog
- Research Engineer, Chip Design RLAnthropic · 🇺🇸San Francisco, CA$500K - $850KLLMReinforcement learningASIC
- Tech Lead, Digital Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$176K - $195KLead and abovePythonHardware interfacesASIC
- Design Verification Emulation, HardwareRiver AI Inc. · 🇺🇸Austin, TX, Palo Alto, CA$200K - $420KPythonC++CI/CD
- Tech Lead Engineer, Design VerificationAstera Labs · 🇺🇸San Jose, California, United States$176K - $195KLead and abovePythonVerilogPowerShell
- FPGA Associate (Winter 2027)Astranis · 🇺🇸San Francisco—VerilogFPGARTL design
- FPGA Associate (Summer 2027)Astranis · 🇺🇸San Francisco—VerilogFPGARTL design
- FPGA Intern (Summer 2027)Astranis · 🇺🇸San Francisco—InternVerilogFPGARTL design
- FPGA Intern (Winter 2027)Astranis · 🇺🇸San Francisco—InternVerilogFPGARTL design
- Design Verification Tech Lead- SerDes/PHY IPAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KLead and abovePythonVerilogPerl
- Midcore Design Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
- Front End Design Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
- Principal Emulation EngineerAstera Labs · 🇺🇸San Jose, California, United States$207K - $230KLead and abovePythonVerilogPerl
- FPGA EngineerEpirus · 🇺🇸Torrance, California, United States$124K - $144KPythonAgileMATLAB
- Sr. Staff Engineer, CPU (Front-End) VerificationTenstorrent · 🇺🇸Austin, Texas, United States; Santa Clara, California, Un…—Lead and aboveC++VerilogCompilers
- Senior FPGA Verification Engineer, Air Dominance and StrikeAnduril Industries · 🇺🇸Costa Mesa, California, United States$166K - $220KSeniorPythonLinuxCI/CD
- AMS Verification Engineer (RFIC Engineering)SpaceX · 🇺🇸Irvine, CA$125K - $160KPythonVerilogFirmware
- FPGA Verification Engineer, Air Dominance and StrikeAnduril Industries · 🇺🇸Costa Mesa, California, United States$146K - $194KPythonLinuxCI/CD
- Director of ASIC Design VerificationSambaNova · 🇺🇸San Jose, California, United States$270K - $340KLead and abovePythonMachine LearningVerilog
- Design Verification EngineerSambaNova · 🇺🇸San Jose, California, United States$120K - $200KPythonMachine LearningVerilog
- Staff Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$225K - $270KLead and abovePython.NETVerilog
- Senior Staff Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$250K - $300KLead and abovePython.NETVerilog
- Verification Engineer - Onsite PA or CA (6269)itD Tech · 🇺🇸Allentown, PA or Carlsbad, CA—PythonVerilogPerl
- Sr. ASIC Design Verification Engineer (Silicon Engineering)SpaceX · 🇺🇸Irvine, CA · +1 more location$165K - $260KSeniorPythonTest planningFirmware
- Design Verification Engineer (Silicon Engineering)SpaceX · 🇺🇸Palo Alto, CA · +1 more location$135K - $155KPythonMATLABVerilog
- Silicon Emulation EngineerWaymo · 🇺🇸Mountain View, CA, USA; New York, NY, USA$175K - $215KPythonC++Linux
- ASIC Design Verification EngineerWaymo · 🇺🇸Mountain View, CA, USA$175K - $215KPythonC++LLM
- Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$190K - $230KPython.NETVerilog
- AI Core DV EngineerDensityAI · 🇺🇸Mountain View, CA; Austin, TX$180K - $275KPythonC++AI
- CPU Verification Fellow, RISC-V High-Performance ProcessorTenstorrent · 🇺🇸Austin, Texas, United States; Santa Clara, California, Un…—VerilogTest planningFirmware
- CPU Core Design Verification Testbench LeadTenstorrent · 🇺🇸Austin, Texas, United States; Santa Clara, California, Un…—Lead and abovePythonC++C
- Design Verification EngineerDensityAI · 🇺🇸Mountain View, CA$200K - $300KASICComputer architectureUVM
- Design Verification Engineer, HardwareRiver AI Inc. · 🇺🇸Palo Alto, CA; Austin, TX$200K - $420KPythonCI/CDBash
- Senior FPGA EngineerEpirus · 🇺🇸Torrance, California, United States$143K - $176KSeniorPythonLinuxMATLAB
- Principal Digital Design Engineer (AI Fabric)Astera Labs · 🇺🇸San Jose, CA$185K - $230KLead and aboveAITest planningFirmware
- Staff/Sr. Staff Design VerificationLightmatter · 🇺🇸Mountain View, CA$196K - $270KLead and abovePythonVerilogData centers
- Design Verification EngineerOpenAI · 🇺🇸San Francisco$226K - $445KHybridVerilogHardware testingComputer architecture
Showing the newest 50. See all 58 in search
Who is hiring for UVM roles in California
What UVM roles in California pay, by level
| Level in the title | Median advertised salary | Roles counted |
|---|---|---|
| No level in the title | $195K | 17 |
| Lead and above | $212K | 17 |
Medians of the midpoints of advertised yearly US-dollar ranges; a level needs at least 15 such roles. Advertised, not verified pay.
Questions about UVM jobs in California
- How many UVM jobs in California are open right now?
- There are 58 open UVM jobs in California at 19 companies on Jobs Every Hour as of Nov 15, 2026. 2 of them were posted in the last seven days. The list is rebuilt every hour from the employers' own careers pages.
- Which companies have the most UVM jobs in California?
- Right now the most openings are at Astera Labs (14), Tenstorrent (6), Astranis (6), SpaceX (5) and SambaNova (4). The ranking changes as companies open and close roles.
- Are there remote UVM jobs in California?
- None of the 58 open UVM jobs in California are listed as remote at the moment. Remote roles appear here as soon as employers post them.
- What do UVM jobs in California pay?
- The median advertised salary is $205K, based on 46 open roles that publish a yearly US-dollar range. The middle half of those roles advertise between $170K and $222K. These are advertised ranges, not verified pay. Most employers here are technology companies, so the figures run above the wider market for the same work.
- Is it hard to get one of the UVM jobs in California?
- 3 of the 58 open UVM jobs in California (5%) are for beginners: junior roles and internships. Of the 48 postings that state experience, the median asks for 5 years. 19 companies are hiring and 2 roles were posted in the last seven days. Matching your resume to the skills each posting names helps most; the free resume builder shows the match.
- How is AI changing UVM jobs in California?
- 11 of the 58 open UVM jobs in California (19%) ask for AI or machine-learning skills, most often Machine Learning, Computer Vision, AI. Employers still list 58 such roles today at 19 companies. Counted from the postings' own text on Nov 15, 2026.
- What skills do UVM jobs in California ask for?
- Most often UVM (100%), Verilog (84%), SystemVerilog (83%), RTL design (79%), Python (76%) of the 58 open postings, counted from their own text on Nov 15, 2026.
- Which job titles come up most in UVM jobs in California?
- Design Verification Engineer (8), Senior FPGA Verification Engineer (2), Principal Design Verification Engineer (2), Senior Design Verification Engineer (2), Principal Verification Engineer (2): the most common titles among the 58 open roles, without the level and place notes in brackets.
- Are UVM jobs in California in demand in 2026?
- 58 UVM jobs in California are open on Jobs Every Hour today at 19 companies, 0.0% of all 148,162 open jobs here; 2 were posted in the last seven days. The median advertised salary is $205K. 0 (0%) can be done remotely.
- How do I apply for UVM jobs in California?
- Open a job and press “Apply on company site”. You go straight to the employer's own careers page and apply there. Jobs Every Hour needs no account and charges nothing for applying.
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