🇺🇸SystemVerilog jobs in the United States
130 open roles mentioning SystemVerilog in the United States as of Nov 15, 2026. SpaceX, Astera Labs, K2 Space, Anduril Industries and SambaNova have the most. 5 are remote and the median advertised salary is $208K.
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Skills asked for in SystemVerilog roles in the United States
Job titles in SystemVerilog roles in the United States
Bars show the share of these 130 roles; one role can count in several rows.
- Principal Design Verifiction EngineerSambaNova · 🇺🇸San Jose, California, United States$180K - $225KLead and abovePythonC++Machine Learning
- Senior FPGA Verification EngineerAnduril Industries · 🇺🇸Waltham, Massachusetts, United States · +2 more locations$191K - $254KSeniorPythonC++Linux
- Senior Firmware EngineerAnduril Industries · 🇺🇸Waltham, Massachusetts, United States$191K - $254KSeniorPythonLinuxMATLAB
- Senior Embedded EngineerAnduril Industries · 🇺🇸Waltham, Massachusetts, United States$191K - $254KSeniorPythonLinuxMATLAB
- FPGA Engineering Intern (Summer 2027)Reliable Robotics · 🇺🇸Mountain View, CA$128KInternPythonC++Verilog
- FPGA EngineerAnysignal · 🇺🇸Los Angeles, CA$130K - $170KPythonC++Bash
- Senior FPGA Prototyping EngineerK2 Space · 🇺🇸United States - Remote · +1 more location$120K - $225KRemoteSeniorPythonVerilogTest planning
- Senior ASIC Design Verification EngineerK2 Space · 🇺🇸United States - Remote · +1 more location$170K - $250KRemoteSeniorPythonC++CI/CD
- Principal ASIC Design Verification EngineerK2 Space · 🇺🇸United States - Remote · +1 more location$190K - $285KRemoteLead and abovePythonC++CI/CD
- Staff Engineer, Digital ASIC Design — Storage ControllersSK hynix memory solutions America Inc. · 🇺🇸San Jose—Lead and aboveMachine LearningVerilogStorage systems
- RTL Design Engineer, Networking / NoCOpenAI · 🇺🇸San Francisco$287K - $485KHybridVerilogHigh-performance computingASIC
- Principal Design Verification Engineer (AI Fabric Switches)Astera Labs · 🇺🇸San Jose, California, United States$185K - $240KLead and abovePythonC++AI
- Sr/Staff Digital Design EngineerLightmatter · 🇺🇸Boston, MA · +1 more location$154K - $218KLead and abovePythonBashVerilog
- Validation and Verification Engineer, Aviation EngineeringSkyryse · 🇺🇸El Segundo, CA$120K - $145KPythonC++MATLAB
- DFT EngineerTenstorrent · 🇺🇸Austin, Texas, United States; Fort Collins, Colorado, Uni…—VerilogHardware interfacesCompilers
- FPGA EngineerTomorrow.io · 🇺🇸Golden, Colorado, United States—VerilogGenerative AITest planning
- Silicon Design LeadOpenAI · 🇺🇸San Francisco$287K - $485KHybridLead and aboveVerilogThreat modelingFirmware
- Principal PCS/PMA RTL Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$185K - $240KLead and abovePythonVerilogPerl
- FPGA Design Engineer (R5347)Shield AI · 🇺🇸Seattle, WA, US$187K - $280KCI/CDVerilogGit
- Software Engineer, Embedded Applications (R5068)Shield AI · 🇺🇸Dallas, TX, US$198K - $296KC++VerilogSecurity clearance
- Technical Lead Digital Design EngineerAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KLead and abovePythonVerilogTest planning
- Hardware Engineers: RTL Implementation and Evaluation WorkflowsTerac · 🇺🇸United States—RemoteVerilogHardware testingASIC
- FPGA EngineerAnduril Industries · 🇺🇸Broomfield, Colorado, United States; Fort Collins, Colora…$144K - $192KPythonC++Docker
- Design Verification Engineer, New GradSambaNova · 🇺🇸San Jose, California, United States$120K - $150KJuniorPythonVerilogPerl
- Principal Design Verification Engineer- SerDes/PHY IPAstera Labs · 🇺🇸San Jose, California, United States$207K - $230KLead and abovePythonVerilogPerl
- Synthesis & STA Engineer – High-Speed SerDesAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KPythonVerilogPerl
- Senior Design Verification EngineerAstera Labs · 🇺🇸San Jose, California, United States · +1 more location$148K - $165KSeniorPythonVerilogPerl
- Principal Verification EngineerAstera Labs · 🇺🇸San Jose, California, United States · +1 more location$185K - $230KLead and abovePythonC++Verilog
- Sr. FPGA Design EngineerReliable Robotics · 🇺🇸Mountain View, CA$215K - $300KSeniorAgileVerilogFirmware
- Senior Digital ASIC Design Engineer - DSP/Analog/SerDesCelero Communications, Inc. · 🇺🇸Irvine, CA · +1 more location$150K - $250KSeniorPythonMATLABVerilog
- Staff ML Accelerator ArchitectWaymo · 🇺🇸Mountain View, CA, USA; New York, New York, USA$251K - $310KLead and aboveMachine LearningVerilogCompilers
- FPGA Engineer (Starshield)SpaceX · 🇺🇸Hawthorne, CA$125K - $160KPythonC++Bash
- SoC EngineerOpenAI · 🇺🇸San Francisco$287K - $485KHybridVerilogFirmwareHardware interfaces
- Sr. ASIC Design Engineer (Silicon Engineering)SpaceX · 🇺🇸Palo Alto, CA · +3 more locations$175K - $280KSeniorPythonVerilogFirmware
- ASIC Design Engineer (Silicon Engineering)SpaceX · 🇺🇸Palo Alto, CA$135K - $175KPythonC++Bash
- FPGA Engineer, EWAnduril Industries · 🇺🇸Costa Mesa, California, United States$146K - $194KPythonLinuxCI/CD
- Formal Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
- Sr. RF Silicon Software Engineer (RFIC Engineering)SpaceX · 🇺🇸Redmond, WA$165K - $270KSeniorPythonC++Verilog
- FPGA/ASIC Design Engineer (Silicon Engineering)SpaceX · 🇺🇸Irvine, CA · +1 more location$125K - $160KPythonC++Bash
- RF Silicon Software Engineer (RFIC Engineering)SpaceX · 🇺🇸Redmond, WA$125K - $165KPythonC++Verilog
- Design Verification Emulation, HardwareRiver AI Inc. · 🇺🇸Austin, TX, Palo Alto, CA$200K - $420KPythonC++CI/CD
- Tech Lead Engineer, Design VerificationAstera Labs · 🇺🇸San Jose, California, United States$176K - $195KLead and abovePythonVerilogPowerShell
- FPGA Associate (Winter 2027)Astranis · 🇺🇸San Francisco—VerilogFPGARTL design
- FPGA Associate (Summer 2027)Astranis · 🇺🇸San Francisco—VerilogFPGARTL design
- FPGA Intern (Summer 2027)Astranis · 🇺🇸San Francisco—InternVerilogFPGARTL design
- FPGA Intern (Winter 2027)Astranis · 🇺🇸San Francisco—InternVerilogFPGARTL design
- Design Verification Tech Lead- SerDes/PHY IPAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KLead and abovePythonVerilogPerl
- Principal DFT EngineerCelero Communications, Inc. · 🇺🇸Irvine, California, United States$200K - $240KLead and abovePythonLinuxVerilog
- Midcore Design Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
- Front End Design Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
Showing the newest 50. See all 130 in search
Who is hiring for SystemVerilog roles in the United States
What SystemVerilog roles in the United States pay, by level
| Level in the title | Median advertised salary | Roles counted |
|---|---|---|
| No level in the title | $180K | 38 |
| Senior | $193K | 33 |
| Lead and above | $220K | 31 |
Medians of the midpoints of advertised yearly US-dollar ranges; a level needs at least 15 such roles. Advertised, not verified pay.
Questions about SystemVerilog jobs in the United States
- How many SystemVerilog jobs in the United States are open right now?
- There are 130 open SystemVerilog jobs in the United States at 30 companies on Jobs Every Hour as of Nov 15, 2026. 13 of them were posted in the last seven days. The list is rebuilt every hour from the employers' own careers pages.
- Which companies have the most SystemVerilog jobs in the United States?
- Right now the most openings are at SpaceX (19), Astera Labs (17), K2 Space (14), Anduril Industries (12) and SambaNova (8). The ranking changes as companies open and close roles.
- Are there remote SystemVerilog jobs in the United States?
- 5 of the 130 open SystemVerilog jobs in the United States (4%) are listed as remote. Remote roles are often limited to certain countries or time zones, so check the location line of each job.
- What do SystemVerilog jobs in the United States pay?
- The median advertised salary is $208K, based on 103 open roles that publish a yearly US-dollar range. The middle half of those roles advertise between $172K and $230K. These are advertised ranges, not verified pay. Most employers here are technology companies, so the figures run above the wider market for the same work.
- Is it hard to get one of the SystemVerilog jobs in the United States?
- 6 of the 130 open SystemVerilog jobs in the United States (5%) are for beginners: junior roles and internships. Of the 105 postings that state experience, the median asks for 5 years. 30 companies are hiring and 13 roles were posted in the last seven days. Matching your resume to the skills each posting names helps most; the free resume builder shows the match.
- How is AI changing SystemVerilog jobs in the United States?
- 33 of the 130 open SystemVerilog jobs in the United States (25%) ask for AI or machine-learning skills, most often Machine Learning, Computer Vision, AI. Employers still list 130 such roles today at 30 companies. Counted from the postings' own text on Nov 15, 2026.
- What skills do SystemVerilog jobs in the United States ask for?
- Most often Verilog (100%), SystemVerilog (100%), Python (80%), RTL design (77%), ASIC (64%) of the 130 open postings, counted from their own text on Nov 15, 2026.
- Which job titles come up most in SystemVerilog jobs in the United States?
- Design Verification Engineer (9), FPGA Engineer (7), Senior FPGA Engineer (7), Senior FPGA Verification Engineer (4), Sr. ASIC Design Engineer (4): the most common titles among the 130 open roles, without the level and place notes in brackets.
- Are SystemVerilog jobs in the United States in demand in 2026?
- 130 SystemVerilog jobs in the United States are open on Jobs Every Hour today at 30 companies, 0.1% of all 148,162 open jobs here; 13 were posted in the last seven days. The median advertised salary is $208K. 5 (4%) can be done remotely.
- How do I apply for SystemVerilog jobs in the United States?
- Open a job and press “Apply on company site”. You go straight to the employer's own careers page and apply there. Jobs Every Hour needs no account and charges nothing for applying.
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