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Synthesis & STA Engineer – High-Speed SerDes

Astera Labs · San Jose, California, United States
$160K - $200KPythonVerilogPerl

Synthesis & STA Engineer – High-Speed SerDes is open at Astera Labs in San Jose, California, United States. The posting gives a salary of $160K - $200K. Posted on Oct 27, 2026, and still on Astera Labs’s careers page when we last checked, on Nov 14, 2026.

About the role

Perform RTL synthesis, driving area, power, and timing optimization for digital controller and DSP blocks within high-speed SerDes PHY designs. Author, develop, and validate SDC constraints from scratch, including clock definitions, generated clocks, multi-frequency/multi-mode constraints, I/O delays, false paths, multicycle paths, and clock-domain crossing exceptions unique to SerDes architectures. Set up and…

The opening lines of the posting. The rest is on Astera Labs’s careers page.

Hiring at Astera Labs

Astera Labs has 173 open roles right now. Most are in Engineering, Design and Supply Chain & Logistics. The median advertised salary across its roles with a published range is $212K. See all its roles

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