Home / Categories / Design verification engineer / Design verification engineer jobs in San Francisco Bay Area
Design verification engineer jobs in San Francisco Bay Area
62 open roles for design verification engineers in San Francisco Bay Area as of Nov 15, 2026. Astera Labs, Matx, Tenstorrent, DensityAI and Voltai.careers have the most. 7 are remote and the median advertised salary is $218K.
My jobs then shows how many are new each time you come back. No account, no email.
Skills asked for in design verification engineer roles in San Francisco Bay Area
Bars show the share of these 62 roles; one role can count in several rows.
- 3D Stacked DRAM - Logic Verification EngineerSK hynix America · 🇺🇸San Jose, CA$140K - $310KVerilog
- Principal Design Verification Engineer (AI Fabric Switches)Astera Labs · 🇺🇸San Jose, California, United States$185K - $240KLead and abovePythonC++AI
- Physical Design and Verification EngineerNeuralink · 🇺🇸South San Francisco, California, United States$131K - $265KPython
- Design Verification EngineerMatx · 🇺🇸Mountain View (HQ) or Remote · +1 more location$160K - $275KRemotePythonC++Verilog
- Lead Verification EngineerAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KLead and abovePythonCNIST
- Sr. Flight Software Verification EngineerReliable Robotics · 🇺🇸Mountain View, CA$185K - $230KSeniorC++CControl systems
- Design Verification Engineer, New GradSambaNova · 🇺🇸San Jose, California, United States$120K - $150KJuniorPythonVerilogPerl
- Principal Design Verification Engineer- SerDes/PHY IPAstera Labs · 🇺🇸San Jose, California, United States$207K - $230KLead and abovePythonVerilogPerl
- Senior Design Verification EngineerAstera Labs · 🇺🇸San Jose, California, United States · +1 more location$148K - $165KSeniorPythonVerilogPerl
- Principal Verification EngineerAstera Labs · 🇺🇸San Jose, California, United States · +1 more location$185K - $230KLead and abovePythonC++Verilog
- Design Verification Engineer - ComputeMatx · 🇺🇸Mountain View (HQ) or Remote$160K - $275KRemoteRustPythonC++
- Flight Software Verification ManagerReliable Robotics · 🇺🇸Mountain View, CA$190K - $270KC++CAUTOSAR
- Emulation & FPGA Prototyping EngineerVoltai.careers · 🇺🇸Palo Alto Office—PythonC++Linux
- Verification EngineerDelos Data · 🇺🇸Palo Alto$160K - $240KRemotePythonVerilog
- Formal Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
- Staff Control Platform and Verification EngineerRidealso · 🇺🇸Palo Alto$225K - $275KLead and abovePythonCI/CDJenkins
- Design Verification Emulation, HardwareRiver AI Inc. · 🇺🇸Austin, TX, Palo Alto, CA$200K - $420KPythonC++CI/CD
- Tech Lead Engineer, Design VerificationAstera Labs · 🇺🇸San Jose, California, United States$176K - $195KLead and abovePythonVerilogPowerShell
- Principal Physical Verification EngineerCelero Communications, Inc. · 🇺🇸San Jose, CA$150K - $250KLead and abovePythonShell scriptingAnalog design
- Design Verification Tech Lead- SerDes/PHY IPAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KLead and abovePythonVerilogPerl
- Midcore Design Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
- Front End Design Verification EngineerTenstorrent · 🇺🇸🇪🇸Santa Clara, California, United States; Spain—PythonC++Verilog
- Principal Emulation EngineerAstera Labs · 🇺🇸San Jose, California, United States$207K - $230KLead and abovePythonVerilogPerl
- Formal Verification and RTL Design Software EngineerAstera Labs · 🇺🇸San Jose, California, United States$160K - $200KPythonLLMCI/CD
- Director of ASIC Design VerificationSambaNova · 🇺🇸San Jose, California, United States$270K - $340KLead and abovePythonMachine LearningVerilog
- Design Verification EngineerSambaNova · 🇺🇸San Jose, California, United States$120K - $200KPythonMachine LearningVerilog
- Formal Verification EngineerHarmonic · 🇺🇸Palo Alto—PythonC++MATLAB
- Staff Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$225K - $270KLead and abovePython.NETVerilog
- Sr. FPGA Verification EngineerReliable Robotics · 🇺🇸Mountain View, CA$215K - $300KSeniorAgileFirmwareFPGA
- Senior Staff Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$250K - $300KLead and abovePython.NETVerilog
- Digital Verification EngineerNeuralink · 🇺🇸South San Francisco, California, United States$131K - $243KPythonC++Verilog
- Formal Verification Research ScientistVoltai.careers · 🇺🇸Palo Alto Office—
- Sr. ASIC Design Verification Engineer (Silicon Engineering)SpaceX · 🇺🇸Palo Alto, CA$175K - $280KSeniorPythonTest planningFirmware
- Design Verification Engineer (Silicon Engineering)SpaceX · 🇺🇸Palo Alto, CA$135K - $155KPythonMATLABVerilog
- IC Design Verification EngineerLumilens · 🇺🇸San Jose—PythonVerilogPerl
- Emulation & Digital Twin EngineerFoundational Industries · 🇺🇸San Francisco Bay Area—PythonC++Docker
- Verification Lead (Lead DV)Lumilens · 🇺🇸San Jose—Lead and aboveVerilog
- Silicon Emulation EngineerWaymo · 🇺🇸Mountain View, CA, USA; New York, NY, USA$175K - $215KPythonC++Linux
- ASIC Design Verification EngineerWaymo · 🇺🇸Mountain View, CA, USA$175K - $215KPythonC++LLM
- Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$190K - $230KPython.NETVerilog
- Performance Verification EngineerDensityAI · 🇺🇸Mountain View, CA$200K - $310KLoad testingHardware testingCompilers
- DV Formal VerificationDensityAI · 🇺🇸Mountain View, CA$200K - $320KRTL designCadence
- AI Core DV EngineerDensityAI · 🇺🇸Mountain View, CA; Austin, TX$180K - $275KPythonC++AI
- CPU Core Design Verification Testbench LeadTenstorrent · 🇺🇸Austin, Texas, United States; Santa Clara, California, Un…—Lead and abovePythonC++C
- Formal Verification EngineerMatx · 🇺🇸Mountain View (HQ) or Remote$160K - $275KRemote
- Design Verification EngineerDensityAI · 🇺🇸Mountain View, CA$200K - $300KASICComputer architectureUVM
- Design Verification Engineer, HardwareRiver AI Inc. · 🇺🇸Palo Alto, CA; Austin, TX$200K - $420KPythonCI/CDBash
- Full-Chip Physical Design Verification EngineerTenstorrent · 🇺🇸Austin, Texas, United States; Fort Collins, Colorado, Uni…—PythonRF engineeringCompilers
- Rust SW-Silicon Co-verification EngineerMatx · 🇺🇸Mountain View (HQ) or Remote$160K - $275KRemoteRustVerilog
- Autonomy Verification EngineerApplied · 🇺🇸Sunnyvale$120K - $180KPythonC++Machine Learning
Showing the newest 50. See all 62 in search
Who is hiring for design verification engineer roles in San Francisco Bay Area
Where design verification engineer roles in San Francisco Bay Area are
- 🇺🇸United States62
- 🇺🇸San Francisco Bay Area62
- 🇺🇸California62
- 🇺🇸Austin, TX6
- 🇺🇸Texas6
- 🇪🇺Europe3
- 🇪🇸Spain3
- 🇺🇸New York, NY1
A role that lists several places is counted in each of them.
What design verification engineer roles in San Francisco Bay Area pay, by level
| Level in the title | Median advertised salary | Roles counted |
|---|---|---|
| No level in the title | $218K | 27 |
| Lead and above | $218K | 15 |
Medians of the midpoints of advertised yearly US-dollar ranges; a level needs at least 15 such roles. Advertised, not verified pay.
Questions about design verification engineer jobs in San Francisco Bay Area
- How many design verification engineer jobs in San Francisco Bay Area are open right now?
- There are 62 open design verification engineer jobs in San Francisco Bay Area at 24 companies on Jobs Every Hour as of Nov 15, 2026. 1 of them were posted in the last seven days. The list is rebuilt every hour from the employers' own careers pages.
- Which companies have the most design verification engineer jobs in San Francisco Bay Area?
- Right now the most openings are at Astera Labs (12), Matx (6), Tenstorrent (5), Voltai.careers (4) and DensityAI (4). The ranking changes as companies open and close roles.
- Are there remote design verification engineer jobs in San Francisco Bay Area?
- 7 of the 62 open design verification engineer jobs in San Francisco Bay Area (11%) are listed as remote. Remote roles are often limited to certain countries or time zones, so check the location line of each job.
- What do design verification engineer jobs in San Francisco Bay Area pay?
- The median advertised salary is $218K, based on 48 open roles that publish a yearly US-dollar range. The middle half of those roles advertise between $195K and $248K. These are advertised ranges, not verified pay. Most employers here are technology companies, so the figures run above the wider market for the same work.
- Is it hard to get one of the design verification engineer jobs in San Francisco Bay Area?
- 1 of the 62 open design verification engineer jobs in San Francisco Bay Area (2%) are for beginners: junior roles and internships. Of the 49 postings that state experience, the median asks for 5 years. 24 companies are hiring and 1 roles were posted in the last seven days. Matching your resume to the skills each posting names helps most; the free resume builder shows the match.
- How is AI changing design verification engineer jobs in San Francisco Bay Area?
- 9 of the 62 open design verification engineer jobs in San Francisco Bay Area (15%) ask for AI or machine-learning skills, most often LLM, Machine Learning, AI. Employers still list 62 such roles today at 24 companies. Counted from the postings' own text on Nov 15, 2026.
- What skills do design verification engineer jobs in San Francisco Bay Area ask for?
- Most often Python (74%), Verilog (69%), ASIC (45%), SystemVerilog (45%), UVM (45%) of the 62 open postings, counted from their own text on Nov 15, 2026.
- Which job titles come up most in design verification engineer jobs in San Francisco Bay Area?
- Design Verification Engineer (11), Formal Verification Engineer (4), Principal Design Verification Engineer (2), Senior Design Verification Engineer (2), Principal Verification Engineer (2): the most common titles among the 62 open roles, without the level and place notes in brackets.
- Are design verification engineer jobs in San Francisco Bay Area in demand in 2026?
- 62 design verification engineer jobs in San Francisco Bay Area are open on Jobs Every Hour today at 24 companies, 0.0% of all 148,162 open jobs here; 1 were posted in the last seven days. The median advertised salary is $218K. 7 (11%) can be done remotely.
- How do I apply for design verification engineer jobs in San Francisco Bay Area?
- Open a job and press “Apply on company site”. You go straight to the employer's own careers page and apply there. Jobs Every Hour needs no account and charges nothing for applying.