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Formal Verification and RTL Design Software Engineer

Astera Labs · San Jose, California, United States

Formal Verification and RTL Design Software Engineer is open at Astera Labs in San Jose, California, United States. The posting gives a salary of $160K - $200K. Posted on Aug 31, 2026, and still on Astera Labs’s careers page when we last checked, on Nov 14, 2026.

About the role

Design, develop, and deploy AI applications using LLMs, agentic frameworks, and related technologies to support RTL, physical and analog design, static/lint checking, and formal verification flows. Build infrastructure to deploy LLM-powered engineering assistants and multi-turn dialogue systems that help designers and verification engineers debug faster and close coverage sooner. Develop agentic AI solutions for…

The opening lines of the posting. The rest is on Astera Labs’s careers page.

Hiring at Astera Labs

Astera Labs has 173 open roles right now. Most are in Engineering, Design and Supply Chain & Logistics. The median advertised salary across its roles with a published range is $212K. See all its roles

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