Verilog salary: $210K median
From 91 open roles that publish a yearly US-dollar range. Advertised ranges, not verified pay.
$210Kmedian advertised salary
$160K – $252Kmiddle half of roles
$217Kaverage advertised salary
91roles counted
Verilog salary by level
Lead roles advertise a median of $220K, 10% more than senior roles ($200K). The level comes from the job title; titles without a level word are counted separately.
| Level | Median salary | Middle half | Roles |
|---|---|---|---|
| Senior | $200K | $166K–$218K | 16 |
| Lead and above | $220K | $202K–$275K | 26 |
| No level in title | $198K | $145K–$300K | 48 |
Verilog salary by location
| Name | Median salary | Roles counted |
|---|---|---|
| 🇺🇸San Francisco Bay Area | $220K | 56 |
| 🇺🇸California | $216K | 72 |
| 🇺🇸United States | $210K | 89 |
Top-paying companies
| Name | Median salary | Roles counted |
|---|---|---|
| OpenAI | $386K | 6 |
| River AI Inc. | $310K | 3 |
| NormalComputing | $300K | 6 |
| Cerebras | $248K | 3 |
| Waymo | $238K | 4 |
| Code Metal | $220K | 3 |
| Delos Data | $205K | 4 |
| SambaNova | $202K | 9 |
| Muon Space | $201K | 3 |
| Celero Communications, Inc. | $200K | 3 |
| Lightmatter | $198K | 8 |
| True Anomaly | $185K | 3 |
| SpaceX | $145K | 17 |
Highest-paying open Verilog roles
All Verilog jobs- Research Engineer, AI for Chip DesignOpenAI · 🇺🇸San Francisco$380K - $500KVerilog
- SoC EngineerOpenAI · 🇺🇸San Francisco$287K - $485KVerilog
- Design Verification Emulation, HardwareRiver AI Inc. · 🇺🇸Austin, TX, Palo Alto, CA$200K - $420KPythonC++CI/CD
- Design Verification Engineer, HardwareRiver AI Inc. · 🇺🇸Palo Alto, CA; Austin, TX$200K - $420KPythonCI/CDBash
- Hardware Engineer, Design VerificationNormalComputing · 🇺🇸New York$200K - $400KPythonLLMCI/CD
- ASIC ArchitectNormalComputing · 🇺🇸Mountain View$200K - $400KPythonC++LLM
- Principal DFT Engineer (Silicon Engineering)SpaceX · 🇺🇸Palo Alto, CA$220K - $355KLeadPythonVerilogPerl
- Director of ASIC Design VerificationSambaNova · 🇺🇸San Jose, California, United States$270K - $340KLeadPythonMachine LearningVerilog
- Principal DFT Engineer (Silicon Engineering)SpaceX · 🇺🇸Irvine, CA$210K - $340KLeadPythonVerilogPerl
- Staff ML Accelerator ArchitectWaymo · 🇺🇸Mountain View, CA, USA; New York, New York, USA$251K - $310KLeadMachine LearningVerilog
- Staff SoC Design EngineerWaymo · 🇺🇸Mountain View, CA, USA$251K - $310KLeadPythonC++Scala
- Senior Staff Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$250K - $300KLeadPython.NETVerilog
- RTL EngineerDensityAI · 🇺🇸Mountain View, CA$215K - $300KPythonVerilog
- Solutions ArchitectCode Metal · 🇺🇸San Francisco Hub$214K - $290KRustPythonC++
- ASIC ArchitectDelos Data · 🇺🇸Palo Alto$160K - $280KPythonC++Verilog
- AI Core DV EngineerDensityAI · 🇺🇸Mountain View, CA; Austin, TX$180K - $275KPythonC++Verilog
- Staff Design Verification EngineerCerebras · 🇺🇸Sunnyvale, CA$225K - $270KLeadPython.NETVerilog
- Staff/Sr. Staff Design VerificationLightmatter · 🇺🇸Mountain View, CA$196K - $270KLeadPythonVerilog
- Staff Electrical Engineer - Sensor FPGAApptronik · 🇺🇸Sunnyvale, CA$244K - $270KLeadVerilog
- Principal Electrical Engineer, FPGA DevelopmentTrue Anomaly · 🇺🇸Long Beach, CA$175K - $265KLeadPythonC++Verilog
Questions about Verilog pay
- What is the average Verilog salary?
- $217K a year on average and $210K at the median, across 91 open Verilog postings at tech companies that state pay (November 2026). The median is the better guide: a few very high offers pull the average up.
- What is the typical range?
- The middle half of the postings offer $160K to $252K a year. A quarter offer less and a quarter offer more.
- Which companies advertise the highest Verilog pay?
- OpenAI ($386K), River AI Inc. ($310K), NormalComputing ($300K), by the median of their open postings that state pay (three postings or more).
- Where do these figures come from?
- From the pay ranges employers print in their own job postings, read from their careers pages every hour. The midpoint of each range is counted. These are advertised ranges for open roles, mostly in the United States and in US dollars, not what people are actually paid.
Writing about this? A sentence you can quote
The median advertised salary for Verilog roles at tech companies is $210K a year, and the middle half of postings offer $160K to $252K. Counted from 91 open job postings that state pay, November 2026. Source: Hiring Right Now, https://jobseveryhour.com/salaries/verilog/
Free to use with the link.









