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RTL Engineer

DensityAI · Mountain View, CA
$215K - $300KOpen 136 daysVisa sponsorshipEquityPythonVerilog

RTL Engineer is open at DensityAI in Mountain View, CA. The posting gives a salary of $215K - $300K. Posted on Jul 1, 2026, and still on DensityAI’s careers page when we last checked, on Nov 14, 2026.

About the role

Design the RTL that defines our AI accelerator. You'll architect and implement the digital blocks — compute datapath, memory subsystem, on-chip interconnect, and control logic — from microarchitecture spec through synthesis-ready, timing-clean RTL, and own those blocks end-to-end with architecture, DV, physical design, and DFT all the way to silicon. What You'll Do: Own RTL design of digital blocks/subsystems for…

The opening lines of the posting. The rest is on DensityAI’s careers page.

Hiring at DensityAI

DensityAI has 27 open roles right now. Most are in Engineering, Compliance & Legal and Finance & Trading. The median advertised salary across its roles with a published range is $242K. See all its roles

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