https://jobseveryhour.com/skills/asic/ASIC jobs — Jobs Every HourSun, 15 Nov 2026 19:27:02 +0000https://jobseveryhour.com/job/principal-design-verifiction-engineer-sambanova/https://jobseveryhour.com/job/principal-design-verifiction-engineer-sambanova/Fri, 13 Nov 2026 00:00:00 +0000San Jose, California, United States. Define and own the verification execution plan end to end for a major subsystem of the RDU — test plan, testbench architecture, coverage model, formal verification, and sign-off criteria Serve as the technical authority for verification of your subsystem: review and arbitrate testbench design decisions, and lead debug on the hardest failures Verify functional and performance behavior Build the coverage model for…https://jobseveryhour.com/job/senior-fpga-verification-engineer-anduril-industries-3/https://jobseveryhour.com/job/senior-fpga-verification-engineer-anduril-industries-3/Fri, 13 Nov 2026 00:00:00 +0000Waltham, Massachusetts, United States. The Imaging team is seeking a Senior FPGA Verification Engineer to help design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products. WHAT YOU’LL DO Verification environment architecture and design using tools like SystemVerilog or…https://jobseveryhour.com/job/senior-fpga-verification-engineer-anduril-industries/https://jobseveryhour.com/job/senior-fpga-verification-engineer-anduril-industries/Fri, 13 Nov 2026 00:00:00 +0000Goleta, California, United States. The Imaging team is seeking a Senior FPGA Verification Engineer to help design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products. WHAT YOU’LL DO Verification environment architecture and design using tools like SystemVerilog or…https://jobseveryhour.com/job/senior-fpga-verification-engineer-anduril-industries-2/https://jobseveryhour.com/job/senior-fpga-verification-engineer-anduril-industries-2/Fri, 13 Nov 2026 00:00:00 +0000Boulder, Colorado, United States. The Imaging team is seeking a Senior FPGA Verification Engineer to help design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products. WHAT YOU’LL DO Verification environment architecture and design using tools like SystemVerilog or…https://jobseveryhour.com/job/security-engineer-6389-itd-tech/https://jobseveryhour.com/job/security-engineer-6389-itd-tech/Fri, 13 Nov 2026 00:00:00 +0000San Jose, CA. Design and develop mechanical components, chassis, card assemblies, and mechanical interfaces for high-performance networking and electronic hardware. Own assigned mechanical designs throughout the product development lifecycle, from concept development and 3D CAD modeling through prototyping, validation, and production. Develop detailed mechanical part and assembly models that accurately communicate component…https://jobseveryhour.com/job/business-development-mining-pool-firmware-luxor/https://jobseveryhour.com/job/business-development-mining-pool-firmware-luxor/Fri, 13 Nov 2026 00:00:00 +0000Miami, FL. Luxor's sales team is organized into specialist pods, and one person owns each pod's revenue. We're hiring the person who will own Mining Pool & Firmware, the core of Luxor's Bitcoin mining business. - Luxor Mining Pool has operated since 2017 and serves institutional miners with >50 EH/s across BTC, LTC, DOGE and ZEC. It offers FPPS payouts, fixed and upfront payout options, and SOC 1 and SOC 2 Type II controls…https://jobseveryhour.com/job/bitcoin-mining-services-business-development-luxor/https://jobseveryhour.com/job/bitcoin-mining-services-business-development-luxor/Fri, 13 Nov 2026 00:00:00 +0000Miami, FL. This posting is always open: we hire strong hunters whenever we meet them. Luxor's sales team is organized into specialist pods: - Hardware & Logistics: ASIC procurement, brokerage and global logistics. - Hashrate Derivatives: hashprice hedges, fixed payouts and financing. - Mining Pool & Firmware: institutional Bitcoin mining pool and LuxOS firmware. - Energy & Commander: power supply and demand response in ERCOT…https://jobseveryhour.com/job/business-development-energy-commander-luxor/https://jobseveryhour.com/job/business-development-energy-commander-luxor/Fri, 13 Nov 2026 00:00:00 +0000Miami, FL. Luxor's sales team is organized into specialist pods, and one person owns each pod's revenue. We're hiring the person who will own Energy & Commander, our fastest-growing product surface and our biggest untapped opportunity. - Luxor Energy is a Bitcoin-native retail electric provider (REP) in ERCOT and a QSE expanding into SPP. We help large flexible loads cut power costs and earn from their flexibility through…https://jobseveryhour.com/job/senior-compliance-manager-derivatives-trade-reporting-okx/https://jobseveryhour.com/job/senior-compliance-manager-derivatives-trade-reporting-okx/Fri, 13 Nov 2026 00:00:00 +0000Remote Roles - EMEA. OKX is hiring a Senior Compliance Officer to build and run our global derivatives trade and transaction reporting function. The function covers CFTC swap data reporting under Part 45, EU transaction reporting under MiFIR, EU derivatives reporting under EMIR, UK MiFIR and UK EMIR, and ASIC derivative transaction reporting across multiple OKX entities and a growing derivatives product set. These regimes have different…https://jobseveryhour.com/job/fp-a-manager-supply-chain-revenue-lightmatter/https://jobseveryhour.com/job/fp-a-manager-supply-chain-revenue-lightmatter/Thu, 12 Nov 2026 00:00:00 +0000Mountain View, CA. Deliver comprehensive customer-level revenue forecasts tracking units from sample evaluation through customer qualification and high volume production ramp. Responsible for auditing the sales pipeline alongside Sales Ops, analyzing Average Selling Prices (ASPs), customer mix, volume discount tiering, and Non-Recurring Engineering (NRE) revenue timing. Create and maintain dynamic, bottom-up financial models for COGS…https://jobseveryhour.com/job/sr-staff-high-speed-communication-architect-ai-systems-tenstorrent/https://jobseveryhour.com/job/sr-staff-high-speed-communication-architect-ai-systems-tenstorrent/Thu, 12 Nov 2026 00:00:00 +0000Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada. Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for…https://jobseveryhour.com/job/senior-counsel-product-legal-airwallex-2/https://jobseveryhour.com/job/senior-counsel-product-legal-airwallex-2/Thu, 12 Nov 2026 00:00:00 +0000SG - Singapore. , you will be the lead counsel for Airwallex’s Yield investment product. You will help scale the product by providing legal, regulatory and strategic advice on the Yield product lifecycle, including product design, licensing, securities and investment regulation, regulatory engagement (SEC, FINRA, MAS, ASIC and other regulators), partner arrangements (broker-dealers, custodians, fund managers and investment…https://jobseveryhour.com/job/counsel-product-legal-airwallex/https://jobseveryhour.com/job/counsel-product-legal-airwallex/Thu, 12 Nov 2026 00:00:00 +0000US - San Francisco. , you will be the lead counsel for Airwallex’s Yield investment product. You will help scale the product by providing legal, regulatory and strategic advice on the Yield product lifecycle, including product design, licensing, securities and investment regulation, regulatory engagement (SEC, FINRA, MAS, ASIC and other regulators), partner arrangements (broker-dealers, custodians, fund managers and investment…https://jobseveryhour.com/job/senior-counsel-product-legal-airwallex/https://jobseveryhour.com/job/senior-counsel-product-legal-airwallex/Thu, 12 Nov 2026 00:00:00 +0000US - San Francisco. , you will be the lead counsel for Airwallex’s Yield investment product. You will help scale the product by providing legal, regulatory and strategic advice on the Yield product lifecycle, including product design, licensing, securities and investment regulation, regulatory engagement (SEC, FINRA, MAS, ASIC and other regulators), partner arrangements (broker-dealers, custodians, fund managers and investment…https://jobseveryhour.com/job/senior-asic-package-design-engineer-k2-space/https://jobseveryhour.com/job/senior-asic-package-design-engineer-k2-space/Wed, 11 Nov 2026 00:00:00 +0000United States - Remote. We are seeking a Senior ASIC Package Design Engineer to implement advanced ASIC package architecture, with a strong focus on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions. This role supports the end-to-end package strategy for high-performance mixed-signal and digital SoCs from early architecture and trade studies through vendor engagement, qualification, and production ramp. You will collaborate with…https://jobseveryhour.com/job/senior-fpga-prototyping-engineer-k2-space-2/https://jobseveryhour.com/job/senior-fpga-prototyping-engineer-k2-space-2/Wed, 11 Nov 2026 00:00:00 +0000United States - Remote. We are seeking a Senior FPGA & Silicon Bring-up Engineer to accelerate the development of next-generation communications ASICs. You will own FPGA prototyping, firmware enablement, first-silicon bring-up, and hardware validation, serving as the bridge between ASIC design, firmware, software, and system integration. This role spans the entire silicon lifecycle from pre-silicon FPGA platforms that enable early…https://jobseveryhour.com/job/senior-asic-physical-design-engineer-k2-space-2/https://jobseveryhour.com/job/senior-asic-physical-design-engineer-k2-space-2/Wed, 11 Nov 2026 00:00:00 +0000United States - Remote. We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full physical design flow—from synthesis to GDSII—working closely with architecture, RTL, verification, and packaging teams. You’ll be a key contributor in achieving timing closure, optimizing PPA, and supporting design integration with…https://jobseveryhour.com/job/senior-asic-design-verification-engineer-k2-space/https://jobseveryhour.com/job/senior-asic-design-verification-engineer-k2-space/Wed, 11 Nov 2026 00:00:00 +0000United States - Remote. We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical…https://jobseveryhour.com/job/principal-asic-physical-design-engineer-k2-space-2/https://jobseveryhour.com/job/principal-asic-physical-design-engineer-k2-space-2/Wed, 11 Nov 2026 00:00:00 +0000United States - Remote. We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design flow—from RTL handoff to GDSII—and collaborate closely with architecture, RTL design, DFT, and packaging teams. This role also involves managing external physical design partners, driving tool and flow decisions, and ensuring…https://jobseveryhour.com/job/principal-asic-package-design-engineer-k2-space-2/https://jobseveryhour.com/job/principal-asic-package-design-engineer-k2-space-2/Wed, 11 Nov 2026 00:00:00 +0000United States - Remote. We are seeking a Principal ASIC Package Design Engineer to lead advanced ASIC package architecture and execution, with a strong focus on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions. This role owns the end-to-end package strategy for high-performance mixed-signal and digital SoCs from early architecture and trade studies through vendor engagement, qualification, and production ramp. You will operate…https://jobseveryhour.com/job/principal-asic-design-verification-engineer-k2-space/https://jobseveryhour.com/job/principal-asic-design-verification-engineer-k2-space/Wed, 11 Nov 2026 00:00:00 +0000United States - Remote. We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical…https://jobseveryhour.com/job/principal-asic-synthesis-and-timing-engineer-k2-space/https://jobseveryhour.com/job/principal-asic-synthesis-and-timing-engineer-k2-space/Wed, 11 Nov 2026 00:00:00 +0000United States - Remote. We are looking for a Principal ASIC Synthesis and Timing Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the constraints development and validation—from RTL handoff to synthesis —and collaborate closely with architecture, RTL design, DFT, and physical design team. This role also involves managing external physical design partners, driving convergence…https://jobseveryhour.com/job/embedded-software-engineer-intern-sk-hynix-memory-solutions-america-inc/https://jobseveryhour.com/job/embedded-software-engineer-intern-sk-hynix-memory-solutions-america-inc/Wed, 11 Nov 2026 00:00:00 +0000San Jose. You will be a member of a group designing system-on-chip (SoC) for non-volatile memory devices. You will be a part of the embedded software development team to validate the product from concept phase, prototyping phase to mass production phase. You will contribute to the SoC development as well as storage solution development, by writing software to exercise all the essential SoC components. Minimum Qualifications…https://jobseveryhour.com/job/sr-physical-design-flow-methodology-engineer-lightmatter/https://jobseveryhour.com/job/sr-physical-design-flow-methodology-engineer-lightmatter/Wed, 11 Nov 2026 00:00:00 +0000Boston, MA. Develop, maintain and extend our physical design flows from synthesis through signoff (place-and-route, CTS, STA, power integrity, DRC/LVS), mostly in Python and TCL. Use AI and LLM-based tools to automate flow tasks such as report triage, debug, constraint checking, DRC/LVS analysis, run monitoring and QoR prediction. Research and prototype new flow capabilities, EDA tool features and methodologies, then turn the…https://jobseveryhour.com/job/mechanical-engineer-npi-manufacturing-anello-photonics/https://jobseveryhour.com/job/mechanical-engineer-npi-manufacturing-anello-photonics/Wed, 11 Nov 2026 00:00:00 +0000Santa Clara, CA. you will design and document products in early stages of PLC, while also designing manufacturing test fixtures applying both custom and off-the shelf hardware and software. In addition, you will contribute to all aspects of assembly and test development, coverage, drive execution and document results. Responsibilities: Lead and support a cross-functional team of engineers (ee, me, fw, optical) in the development of…https://jobseveryhour.com/job/senior-board-test-engineer-graphcore/https://jobseveryhour.com/job/senior-board-test-engineer-graphcore/Wed, 11 Nov 2026 00:00:00 +0000Bristol, UK. Turn board design insight into reliable tests that detect manufacturing defects in Graphcore’s hardware. As a Senior Board Test Engineer in Bristol, you’ll develop manufacturing tests for Graphcore’s advanced electronic products. You’ll focus on printed circuit board assemblies and the faults that affect their operation. Your work will help improve defect coverage across the test and inspection tools used by…https://jobseveryhour.com/job/senior-hardware-design-engineer-arago/https://jobseveryhour.com/job/senior-hardware-design-engineer-arago/Wed, 11 Nov 2026 00:00:00 +0000Paris Offices. Design and verify custom digital hardware components and architectures that enable high-performance, tightly integrated computation workloads and interface Arago’s custom tensor unit for advanced AI/ML applications. RESPONSIBILITIES - Design, implement, and verify RTL blocks for memory, control, and compute subsystems within Arago’s custom multiphysics computation unit. - Collaborate with Arago’s system software and…https://jobseveryhour.com/job/staff-engineer-digital-asic-design-storage-controllers-sk-hynix-memory-solutions-america-inc/https://jobseveryhour.com/job/staff-engineer-digital-asic-design-storage-controllers-sk-hynix-memory-solutions-america-inc/Tue, 10 Nov 2026 00:00:00 +0000San Jose. Join our digital ASIC design team to develop IP for next-generation SSD controllers and storage solutions. This role offers opportunities across the controller architecture, including host interfaces, on-chip interconnects, and back-end NAND subsystems. You will translate product requirements into microarchitecture specifications, implement high-quality RTL, and collaborate with verification and physical design…https://jobseveryhour.com/job/sr-electrical-hardware-engineer-ai-satellites-starmind-spacex/https://jobseveryhour.com/job/sr-electrical-hardware-engineer-ai-satellites-starmind-spacex/Tue, 10 Nov 2026 00:00:00 +0000Bastrop, TX. Rapidly develop high-reliability electronics for satellites and spacecraft. Drive system trades, requirements capture, component selection, analysis, schematic capture, PCB layout, prototyping, hardware bring-up, debugging, documentation, manufacturing, test, and on-orbit performance of complex electrical designs Get hands-on and support hardware through production, satellite integration, and flight Determine layer…https://jobseveryhour.com/job/staff-software-engineer-control-psiquantum/https://jobseveryhour.com/job/staff-software-engineer-control-psiquantum/Tue, 10 Nov 2026 00:00:00 +0000Palo Alto, California. The OS Core Team at PsiQuantum works closely alongside engineers and scientists in the electronics, system architecture, and validation teams and is responsible for building the scalable, distributed, fault-tolerant control plane and operating system for utility scale photonic quantum computers. Our team is responsible for orchestration, scheduling, kernel architecture, co-design, calibration, validation, providing…https://jobseveryhour.com/job/rtl-design-engineer-networking-noc-openai/https://jobseveryhour.com/job/rtl-design-engineer-networking-noc-openai/Tue, 10 Nov 2026 00:00:00 +0000San Francisco. We’re looking for an RTL Design Engineer to help design and develop next-generation AI accelerator silicon. In this role, you'll work across architecture, microarchitecture, and RTL implementation, translating complex system and performance requirements into efficient, scalable hardware designs. You'll collaborate closely with silicon architects, hardware and software engineers, verification, and physical design…https://jobseveryhour.com/job/wi-fi-engineer-hardware-reliability-starlink-spacex/https://jobseveryhour.com/job/wi-fi-engineer-hardware-reliability-starlink-spacex/Sun, 08 Nov 2026 00:00:00 +0000Bastrop, TX. p]:inline" data-streamdown="list-item">Perform telemetry and log analysis as well as hands-on debugging to drive to root cause and corrective action of failed phased-array, Wi-Fi, and power supply PCBAs p]:inline" data-streamdown="list-item">Build and maintain critical tools and custom software to objectively assess the performance and reliability of Starlink customer hardware p]:inline"…https://jobseveryhour.com/job/electrical-hardware-engineer-ai-satellites-starmind-spacex/https://jobseveryhour.com/job/electrical-hardware-engineer-ai-satellites-starmind-spacex/Sun, 08 Nov 2026 00:00:00 +0000Bastrop, TX. Rapidly develop high-reliability electronics for satellites and spacecraft. Drive system trades, requirements capture, component selection, analysis, schematic capture, PCB layout, prototyping, hardware bring-up, debugging, documentation, manufacturing, test, and on-orbit performance of complex electrical designs Get hands-on and support hardware through production, satellite integration, and flight Determine layer…https://jobseveryhour.com/job/sr-electrical-engineer-hardware-reliability-starlink-spacex/https://jobseveryhour.com/job/sr-electrical-engineer-hardware-reliability-starlink-spacex/Sun, 08 Nov 2026 00:00:00 +0000Bastrop, TX. are expected to become intimately familiar with the circuits, manufacturing processes, and test procedures for the designs they support. RESPONSIBILITIES: Own qualification and test of new electrical designs and SMT manufacturing lines for high volume production Perform hands-on debugging to drive to root cause and corrective action of failed phased-array antenna, Wi-Fi router, and power supply PCBAs Utilize…https://jobseveryhour.com/job/electrical-engineer-hardware-reliability-starlink-spacex/https://jobseveryhour.com/job/electrical-engineer-hardware-reliability-starlink-spacex/Sun, 08 Nov 2026 00:00:00 +0000Bastrop, TX. Own qualification and test of new electrical designs and SMT manufacturing lines for high volume production Perform hands-on debugging to drive to root cause and corrective action of failed phased-array antenna, Wi-Fi router, power supply PCBAs, and cables. Failures may be observed in test, production, or the field Utilize advanced diagnostic tools such as oscilloscopes, spectrum analyzers, x-ray machines, logic…https://jobseveryhour.com/job/principal-design-verification-engineer-ai-fabric-switches-astera-labs/https://jobseveryhour.com/job/principal-design-verification-engineer-ai-fabric-switches-astera-labs/Sat, 07 Nov 2026 00:00:00 +0000San Jose, California, United States. Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software…https://jobseveryhour.com/job/director-post-si-electrical-validation-engineering-astera-labs/https://jobseveryhour.com/job/director-post-si-electrical-validation-engineering-astera-labs/Sat, 07 Nov 2026 00:00:00 +0000San Jose, California, United States. Board Product Strategy and Technical Leadership Lead ASIC Electrical-level (PHY) validation strategy across product definition, architecture, PCB/test fixture development, Validation Automation, data review, bring-up, debug, optimization, qualification, and production release. Define validation plans, coverage goals, risk assessments, schedules, and exit criteria for high-speed ASIC and PHY IP Make hands-on…https://jobseveryhour.com/job/sr-staff-digital-design-engineer-lightmatter-3/https://jobseveryhour.com/job/sr-staff-digital-design-engineer-lightmatter-3/Fri, 06 Nov 2026 00:00:00 +0000Toronto, ON. Develop RTL (i.e. system Verilog) modules with DFT considerations for IC development Debug complex logic and mixed signal simulations Understand and integrate silicon photonic communication and compute technology into digital accelerator design Actively work with Architecture, Design Verification, Physical Design, Photonic, Analog and Software teams to realize high performance, low power designs in advanced…https://jobseveryhour.com/job/sr-staff-digital-design-engineer-lightmatter-2/https://jobseveryhour.com/job/sr-staff-digital-design-engineer-lightmatter-2/Fri, 06 Nov 2026 00:00:00 +0000Boston, MA. Develop RTL (i.e. system Verilog) modules with DFT considerations for IC development Debug complex logic and mixed signal simulations Understand and integrate silicon photonic communication and compute technology into digital accelerator design Actively work with Architecture, Design Verification, Physical Design, Photonic, Analog and Software teams to realize high performance, low power designs in advanced…https://jobseveryhour.com/job/sr-staff-digital-design-engineer-lightmatter/https://jobseveryhour.com/job/sr-staff-digital-design-engineer-lightmatter/Fri, 06 Nov 2026 00:00:00 +0000Mountain View, CA. Develop RTL (i.e. system Verilog) modules with DFT considerations for IC development Debug complex logic and mixed signal simulations Understand and integrate silicon photonic communication and compute technology into digital accelerator design Actively work with Architecture, Design Verification, Physical Design, Photonic, Analog and Software teams to realize high performance, low power designs in advanced…https://jobseveryhour.com/job/physical-design-and-cad-engineer-astera-labs/https://jobseveryhour.com/job/physical-design-and-cad-engineer-astera-labs/Fri, 06 Nov 2026 00:00:00 +0000San Jose, California, United States. As a Physical Design & CAD Engineer , you will serve as a Technical Lead developing Astera Labs’ next-generation connectivity ASICs for cloud and AI infrastructure. This role combines Physical Design CAD methodology development with hands-on place-and-route (PNR) implementation. You will develop and optimize automated design flows for advanced process nodes while contributing to block-level physical design, timing…https://jobseveryhour.com/job/dft-engineer-tenstorrent-2/https://jobseveryhour.com/job/dft-engineer-tenstorrent-2/Fri, 06 Nov 2026 00:00:00 +0000Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States. is Design for Test (DFT) for high-performance designs going into industry leading AI/ML architectures. The person coming into this role will be involved in all implementation aspects from RTL to tapeout for various IPs on the chip. High level challenges include reducing test cost while attaining high coverage, and facilitating debug and yield learnings while minimizing design intrusions. The work is done…https://jobseveryhour.com/job/principal-design-engineer-astera-labs/https://jobseveryhour.com/job/principal-design-engineer-astera-labs/Fri, 06 Nov 2026 00:00:00 +0000San Jose, California, United States. We are looking for Principal Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration, and block-level verification for high performance network controllers. The candidate must have good knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet etc. Basic…https://jobseveryhour.com/job/senior-lead-vls-engineer-global-circuits-sambanova/https://jobseveryhour.com/job/senior-lead-vls-engineer-global-circuits-sambanova/Thu, 05 Nov 2026 00:00:00 +0000San Jose, California, United States. We are looking for a Senior / Lead VLSI Design Engineer to serve as the architect and hands-on owner for various global circuit areas including custom clocking, low-power design technqiues and power distribution integrity while championing chip-level PLL, IO, ESD, and Latch-Up strategy and Integration. In this role, you will design and optimize ultra-low-jitter, low-skew and low-power custom clock distribution…https://jobseveryhour.com/job/technical-partnerships-specialist-manager-emerging-tech-lab-lg-electronics/https://jobseveryhour.com/job/technical-partnerships-specialist-manager-emerging-tech-lab-lg-electronics/Thu, 05 Nov 2026 00:00:00 +0000Santa Clara, CA. Help turn emerging technologies into business opportunities. LG is seeking an experienced technical business development professional who can connect research and engineering capabilities with customer needs, identify promising partners, and advance collaborations with practical business value. You will work with Emerging Technology Lab leaders, engineers, researchers, and LG’s HQ CTO centers and labs to bring…https://jobseveryhour.com/job/new-graduate-engineer-electrical-satellites-starlink-spacex/https://jobseveryhour.com/job/new-graduate-engineer-electrical-satellites-starlink-spacex/Thu, 05 Nov 2026 00:00:00 +0000Redmond, WA. Rapidly develop high-reliability electronics for satellites and spacecraft. Drive system trades, requirements capture, component selection, analysis, schematic capture, PCB layout, prototyping, hardware bring-up, debugging, documentation, manufacturing, test, and on-orbit performance of complex electrical designs. Get hands-on and support hardware through production, satellite integration, and flight. Work closely…https://jobseveryhour.com/job/senior-principal-engineer-fw-sw-development-astera-labs/https://jobseveryhour.com/job/senior-principal-engineer-fw-sw-development-astera-labs/Thu, 05 Nov 2026 00:00:00 +0000San Jose, California, United States. Astera Labs is seeking a Senior Principal / Distinguished Engineer - FW/SW Development to join our engineering team in San Jose, CA. This is a high-impact individual contributor role at the heart of our Intelligent Connectivity Platform, where you'll architect and develop firmware and software that powers the next generation of AI infrastructure connectivity solutions. As a Senior Principal / Distinguished Engineer…https://jobseveryhour.com/job/sr-rf-microwave-engineer-satellites-starlink-spacex/https://jobseveryhour.com/job/sr-rf-microwave-engineer-satellites-starlink-spacex/Wed, 04 Nov 2026 00:00:00 +0000Redmond, WA. Simulate and model communication systems Work with system architects, RF engineers, antenna engineers, modem/DSP, and ASIC engineers to partition functions between hardware and software domains Assess feasibility of various designs in support of architectural definition Deriving top-level specifications for RF links and RF and antenna subsystems Characterize and analyze system performance Provide technical support…https://jobseveryhour.com/job/hardware-systems-engineer-ai-hardware-cloudflare/https://jobseveryhour.com/job/hardware-systems-engineer-ai-hardware-cloudflare/Wed, 04 Nov 2026 00:00:00 +0000Hybrid. We need to make thoughtful infrastructure choices affecting a significant portion of the Internet. Hardware we work with includes GPUs, servers and components, as well as PDUs and network hardware. As a Hardware Systems Engineer, you will work with colleagues on the Engineering teams, Product and Performance teams, and Hardware Sourcing teams to design, qualify and maintain Cloudflare’s worldwide fleet of GPU…https://jobseveryhour.com/job/validation-chief-of-staff-graphcore/https://jobseveryhour.com/job/validation-chief-of-staff-graphcore/Wed, 04 Nov 2026 00:00:00 +0000Austin, Texas, United States. Reporting to senior leadership within Architecture and Validation, the Validation Chief of Staff will support strategic execution, operational coordination and cross-functional alignment across the validation organisation. This role is responsible for driving organisational effectiveness across multiple validation teams, helping coordinate priorities, improve execution visibility and support delivery of key…https://jobseveryhour.com/job/rf-microwave-engineer-satellites-starlink-spacex/https://jobseveryhour.com/job/rf-microwave-engineer-satellites-starlink-spacex/Wed, 04 Nov 2026 00:00:00 +0000Redmond, WA. Simulate and model communication systems Work with system architects, RF engineers, antenna engineers, modem/DSP, and ASIC engineers to partition functions between hardware and software domains Assess feasibility of various designs in support of architectural definition Deriving top-level specifications for RF links and RF and antenna subsystems Characterize and analyze system performance Provide technical support…https://jobseveryhour.com/job/silicon-design-lead-openai/https://jobseveryhour.com/job/silicon-design-lead-openai/Wed, 04 Nov 2026 00:00:00 +0000San Francisco. We’re looking for a Silicon Design Lead to drive architecture, microarchitecture, and implementation of key IP and subsystems for our AI hardware platforms. You will translate functional, performance, and security requirements into efficient silicon designs, owning technical decisions from architectural definition through implementation and integration. Part of this role will focus on hardware security…https://jobseveryhour.com/job/electronic-design-engineer-satellites-starlink-spacex/https://jobseveryhour.com/job/electronic-design-engineer-satellites-starlink-spacex/Wed, 04 Nov 2026 00:00:00 +0000Redmond, WA. Rapidly develop high-reliability electronics for satellites and spacecraft. Drive system trades, requirements capture, component selection, analysis, schematic capture, PCB layout, prototyping, hardware bring-up, debugging, documentation, manufacturing, test, and on-orbit performance of complex electrical designs Get hands-on and support hardware through production, satellite integration, and flight Work closely…https://jobseveryhour.com/job/electrical-hardware-engineer-satellites-starlink-spacex/https://jobseveryhour.com/job/electrical-hardware-engineer-satellites-starlink-spacex/Wed, 04 Nov 2026 00:00:00 +0000Redmond, WA. Rapidly develop high-reliability electronics for satellites and spacecraft. Drive system trades, requirements capture, component selection, analysis, schematic capture, PCB layout, prototyping, hardware bring-up, debugging, documentation, manufacturing, test, and on-orbit performance of complex electrical designs Get hands-on and support hardware through production, satellite integration, and flight Work closely…https://jobseveryhour.com/job/electrical-engineer-satellites-starlink-spacex/https://jobseveryhour.com/job/electrical-engineer-satellites-starlink-spacex/Wed, 04 Nov 2026 00:00:00 +0000Redmond, WA. Rapidly develop high-reliability electronics for satellites and spacecraft. Drive system trades, requirements capture, component selection, analysis, schematic capture, PCB layout, prototyping, hardware bring-up, debugging, documentation, manufacturing, test, and on-orbit performance of complex electrical designs Get hands-on and support hardware through production, satellite integration, and flight Work closely…https://jobseveryhour.com/job/software-integration-engineer-4-linux-bash-python-vmware-ans-captivation-software/https://jobseveryhour.com/job/software-integration-engineer-4-linux-bash-python-vmware-ans-captivation-software/Wed, 04 Nov 2026 00:00:00 +0000Annapolis Junction, MD. Build to something to be proud of. Captivation has built a reputation on providing customers exactly what is needed in a timely manner. Our team of engineers take pride in what they develop and constantly innovate to provide the best solution. Captivation is looking for software developers who can get stuff done while making a difference in support of the mission to protect our country. Description Captivation…https://jobseveryhour.com/job/mixed-signal-ic-design-engineer-arago/https://jobseveryhour.com/job/mixed-signal-ic-design-engineer-arago/Wed, 04 Nov 2026 00:00:00 +0000Paris Offices. Design, integrate, and deliver high-performance digital subsystems within mixed-signal ICs, enabling control, calibration, and high-speed data movement in analog-centric environments — owning the flow from RTL to physical implementation and tape-out. RESPONSIBILITIES - Design and verify digital subsystems that interface directly with high-speed analog and mixed-signal circuits — including calibration engines…https://jobseveryhour.com/job/embedded-software-engineer-satellite-antenna-starlink-spacex/https://jobseveryhour.com/job/embedded-software-engineer-satellite-antenna-starlink-spacex/Tue, 03 Nov 2026 00:00:00 +0000Redmond, WA. Develop embedded software for custom modem and beamformer silicon ASICs that form the foundation of Starlink’s phased array antennas Write flight-critical software to ensure intended operation of the antenna throughout the lifecycle of the satellite Collaborate with phased array antenna engineers to build and implement new techniques to measure antennas as part of our CI/CD process Analyze on-orbit performance data…https://jobseveryhour.com/job/principal-pcs-pma-rtl-design-engineer-astera-labs/https://jobseveryhour.com/job/principal-pcs-pma-rtl-design-engineer-astera-labs/Tue, 03 Nov 2026 00:00:00 +0000San Jose, California, United States. PCS/PMA RTL design and implementation Develop synthesizable Verilog/SystemVerilog RTL for PCS and PMA digital blocks supporting Ethernet, PCIe, UCIe, UALink, and related protocols. Implement PCS functions such as line encoding/decoding (64b/66b, 128b/130b, 8b/10b), scrambling/descrambling, block and word alignment, lane deskew and reordering, gearboxes, elastic buffers/FIFOs, and rate adaptation. Implement forward…https://jobseveryhour.com/job/crypto-mining-technician-fortitude-mining-llc/https://jobseveryhour.com/job/crypto-mining-technician-fortitude-mining-llc/Tue, 03 Nov 2026 00:00:00 +0000Aurora, Nebraska, United States; Big Spring, Texas, United States; Grand Island, Nebraska, United States; Prosser, Nebraska, United States. Support day-to-day cryptocurrency mining operations through hands-on execution of assigned tasks Deploy and decommission mining equipment in data center environments, including racking, cabling, and basic configuration following established procedures Perform routine operational checks and preventative maintenance on the active mining fleet Complete basic repairs and component replacements, including fans, power…https://jobseveryhour.com/job/office-manager-celero-communications-inc/https://jobseveryhour.com/job/office-manager-celero-communications-inc/Tue, 03 Nov 2026 00:00:00 +0000San Jose, CA. Celero is seeking an organized, proactive Office Manager to run day-to-day operations at our San Jose office and shape the employee and visitor experience as we grow our coherent optical DSP ASIC business. You will be the go-to person for keeping the office running smoothly, a trusted partner to leadership, and a key contributor to a welcoming, well-organized workplace where our engineering and business teams can…https://jobseveryhour.com/job/eda-cloud-developer-infrastructure-engineer-openai/https://jobseveryhour.com/job/eda-cloud-developer-infrastructure-engineer-openai/Tue, 03 Nov 2026 00:00:00 +0000San Francisco. We’re looking for an Infrastructure Software Engineer to build and scale the infrastructure and developer workflows that power OpenAI’s custom silicon development. You’ll work closely with engineering teams across design verification, physical design, emulation, formal verification, and systems software to develop reliable, automated, and efficient workflows that accelerate hardware development. In this role, you'll…https://jobseveryhour.com/job/senior-system-tests-diagnostics-engineer-graphcore/https://jobseveryhour.com/job/senior-system-tests-diagnostics-engineer-graphcore/Mon, 02 Nov 2026 00:00:00 +0000Austin, Texas, United States. and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and…https://jobseveryhour.com/job/technical-lead-digital-design-engineer-astera-labs/https://jobseveryhour.com/job/technical-lead-digital-design-engineer-astera-labs/Mon, 02 Nov 2026 00:00:00 +0000San Jose, California, United States. Own the RTL implementation of complex digital designs from micro-architecture through sign-off. Collaborate with verification teams to review test plans and debug issues. Support efforts to achieve timing closure and implement Design-for-Test (DFT) features. Scripting and automation for ASIC methodology improvement. Accountable for quality and overall design success with the support of senior engineers. Required…https://jobseveryhour.com/job/sr-software-engineer-systems-framework-infrastructure-tenstorrent/https://jobseveryhour.com/job/sr-software-engineer-systems-framework-infrastructure-tenstorrent/Mon, 02 Nov 2026 00:00:00 +0000Toronto, Ontario, Canada. , you will focus on developing software frameworks, APIs, tooling, infrastructure, and continuous integration (CI) regression systems to introspect and test our ASICs and systems, while supporting teams across Tenstorrent. You will gain experience with state-of-the-art ML processor architecture, board design, and debugging. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various…https://jobseveryhour.com/job/principal-system-tests-diagnostics-engineer-graphcore/https://jobseveryhour.com/job/principal-system-tests-diagnostics-engineer-graphcore/Mon, 02 Nov 2026 00:00:00 +0000Austin, Texas, United States. and Duties We are seeking a highly skilled Principal System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon…https://jobseveryhour.com/job/head-of-operations-australia-new-zealand-anz-binance/https://jobseveryhour.com/job/head-of-operations-australia-new-zealand-anz-binance/Mon, 02 Nov 2026 00:00:00 +0000Australia. Lead and manage the day-to-day operations of the ANZ fiat and digital asset exchange business, ensuring operational resilience, scalability and efficiency.Build, optimise and oversee internal operational frameworks across: fiat onboarding and payments,customer operations, transaction monitoring, reconciliations, settlements, custody operations,and exchange support functions. Partner closely with Compliance, Risk…https://jobseveryhour.com/job/staff-principal-asic-design-engineer-astera-labs/https://jobseveryhour.com/job/staff-principal-asic-design-engineer-astera-labs/Sun, 01 Nov 2026 00:00:00 +0000Haifa District, Israel. Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Staff / Principal ASIC Design Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful…https://jobseveryhour.com/job/dft-engineer-astera-labs/https://jobseveryhour.com/job/dft-engineer-astera-labs/Sun, 01 Nov 2026 00:00:00 +0000Haifa District, Israel. Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new…https://jobseveryhour.com/job/staff-dft-engineer-astera-labs/https://jobseveryhour.com/job/staff-dft-engineer-astera-labs/Sun, 01 Nov 2026 00:00:00 +0000Haifa District, Israel. Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Staff DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a…https://jobseveryhour.com/job/principal-dft-engineer-astera-labs-3/https://jobseveryhour.com/job/principal-dft-engineer-astera-labs-3/Sun, 01 Nov 2026 00:00:00 +0000Haifa District, Israel. Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Principal DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership…https://jobseveryhour.com/job/physical-design-team-lead-astera-labs-2/https://jobseveryhour.com/job/physical-design-team-lead-astera-labs-2/Sun, 01 Nov 2026 00:00:00 +0000Haifa District, Israel. Astera Labs is a hyper-growth connectivity company building the purpose-built silicon that powers rack-scale AI infrastructure. As a Principal Physical Design Engineer and Team Lead in Israel, you will lead physical design teams that take complex, high-speed mixed-signal and digital SoCs from RTL handoff through tapeout. You will set the technical direction, drive execution across multiple projects, and grow the…https://jobseveryhour.com/job/staff-principal-chip-top-physical-design-engineer-astera-labs-2/https://jobseveryhour.com/job/staff-principal-chip-top-physical-design-engineer-astera-labs-2/Sun, 01 Nov 2026 00:00:00 +0000Haifa District, Israel. Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Chip Top Physical Design Engineer focusing on implementation to join our local engineering powerhouse from the ground up. If you thrive on solving complex…https://jobseveryhour.com/job/senior-asic-design-engineer-astera-labs/https://jobseveryhour.com/job/senior-asic-design-engineer-astera-labs/Sun, 01 Nov 2026 00:00:00 +0000Haifa District, Israel. Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Senior ASIC Design Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful product…https://jobseveryhour.com/job/hardware-engineers-rtl-implementation-and-evaluation-workflo-terac/https://jobseveryhour.com/job/hardware-engineers-rtl-implementation-and-evaluation-workflo-terac/Sat, 31 Oct 2026 00:00:00 +0000United States. Walk us through your approach to RTL implementation and hardware description - Review and react to specific automated evaluation scenarios - Describe a recent time you tackled a complex hardware verification challenge - Provide feedback on current workflows and tooling gaps WHO SHOULD APPLY - Professional experience in hardware engineering or RTL design - Hands-on background with hardware description languages…https://jobseveryhour.com/job/sr-thermal-engineer-starlink-spacex/https://jobseveryhour.com/job/sr-thermal-engineer-starlink-spacex/Fri, 30 Oct 2026 00:00:00 +0000Bastrop, TX. Thermal system design of next-generation phased arrays, gateways, and consumer wireless products – own every component, part, and interface in the design Thermal design of semiconductor packages, from high level concepts to detail thermal simulations and lab testing Devise, build, and run tests to validate the expected performance of the hardware in extreme conditions Automate workflow and pursue operational…https://jobseveryhour.com/job/forward-deployed-engineer-inference-cohere/https://jobseveryhour.com/job/forward-deployed-engineer-inference-cohere/Wed, 28 Oct 2026 00:00:00 +0000United States. , you will act as the principal technical translation layer between our core engineering teams and our strategic partners. You will own the architecture for highly ambiguous, customer-specific inference challenges—ranging from multi-tenant model serving to multi-datacenter disaster recovery and custom hardware validation. You will lead technical adoption end-to-end, ensuring our models achieve exceptionally low…https://jobseveryhour.com/job/senior-foundry-development-engineer-attotude/https://jobseveryhour.com/job/senior-foundry-development-engineer-attotude/Wed, 28 Oct 2026 00:00:00 +0000Menlo Park, California. works closely with AttoTude's teams covering product development, packaging, and foundry interface. This role will combine fundamental electrical engineering, surface science and materials science knowledge with hands-on experimentation. A successful candidate will develop hypotheses, design and execute experiments, work with internal and external fabrication facilities, and translate experimental observations into…https://jobseveryhour.com/job/senior-design-verification-engineer-ai-hardware-tenstorrent/https://jobseveryhour.com/job/senior-design-verification-engineer-ai-hardware-tenstorrent/Wed, 28 Oct 2026 00:00:00 +0000Belgrade, Serbia. Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for…https://jobseveryhour.com/job/staff-design-verification-engineer-ai-hardware-tenstorrent/https://jobseveryhour.com/job/staff-design-verification-engineer-ai-hardware-tenstorrent/Wed, 28 Oct 2026 00:00:00 +0000Belgrade, Serbia. Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for…https://jobseveryhour.com/job/eda-and-cad-lead-engineer-manager-attotude/https://jobseveryhour.com/job/eda-and-cad-lead-engineer-manager-attotude/Wed, 28 Oct 2026 00:00:00 +0000Menlo Park, CA, Bethlehem, PA. , you will be part of the experience design and layout team to develop cutting-edge mixed-signal ICs. You will be involved in the technical aspects of the ASIC design and development, from concept through to production. This is a hands-on technical position that requires in-depth technical expertise, and the ability to work in a team of highly experienced engineers to accomplish the goals. Key Responsibilities…https://jobseveryhour.com/job/post-silicon-validation-engineer-new-grad-sambanova/https://jobseveryhour.com/job/post-silicon-validation-engineer-new-grad-sambanova/Tue, 27 Oct 2026 00:00:00 +0000San Jose, California, United States. As a new grad Post-Silicon Validation Engineer, you'll test new RDU silicon in the lab. You'll run characterization and stress tests on interfaces like PCIe, Ethernet, and HBM, write Python scripts to automate testing and analyze results, and help debug issues with the design, firmware, and system teams. Responsibilities Run functional, characterization, stress, and performance tests on high-speed IO and memory…https://jobseveryhour.com/job/physical-design-engineer-new-grad-sambanova/https://jobseveryhour.com/job/physical-design-engineer-new-grad-sambanova/Tue, 27 Oct 2026 00:00:00 +0000San Jose, California, United States. As a new grad Physical Design Engineer, you'll run and improve our RTL to GDS flow on advanced process nodes. You'll write TCL and Python scripts to automate flow steps, help physical designers debug timing and congestion issues, and work with tool vendors on bugs. Responsibilities Run synthesis and place and route using Cadence Genus, Innovus, and Cerebrus Write scripts in TCL and Python to automate and improve the…https://jobseveryhour.com/job/design-verification-engineer-new-grad-sambanova/https://jobseveryhour.com/job/design-verification-engineer-new-grad-sambanova/Tue, 27 Oct 2026 00:00:00 +0000San Jose, California, United States. As a new grad Design Verification Engineer, you'll write testbenches, tests, checkers, and coverage in SystemVerilog and UVM for RDU features. You'll run regressions, debug simulation failures, and work with RTL designers to find and fix bugs before tape-out. Responsibilities Write and execute verification plans for chip-level control and initialization features Build SystemVerilog and UVM testbench components…https://jobseveryhour.com/job/junior-emulation-engineer-celero-communications-inc/https://jobseveryhour.com/job/junior-emulation-engineer-celero-communications-inc/Tue, 27 Oct 2026 00:00:00 +0000Cordoba, Argentina. , you will help compile, run, and debug RTL on emulation systems, supporting early validation of hardware and firmware ahead of tape-out. You will work closely with RTL design, verification, and firmware teams, learn from senior engineers, and grow into an independent contributor on next-generation semiconductor products. Key Responsibilities Emulation Bring-Up: Support compilation, partitioning, and bring-up of RTL…https://jobseveryhour.com/job/principal-design-verification-engineer-serdes-phy-ip-astera-labs/https://jobseveryhour.com/job/principal-design-verification-engineer-serdes-phy-ip-astera-labs/Tue, 27 Oct 2026 00:00:00 +0000San Jose, California, United States. Astera Labs is hiring a Principal Design Verification Engineer to own functional verification of our high-speed SerDes/PHY IP — the connectivity engine powering rack-scale AI infrastructure. You will architect verification environments, drive coverage closure, and ensure first-pass silicon success on the analog/digital boundary that defines next-generation AI systems. This is a high-impact, hands-on role at the…https://jobseveryhour.com/job/synthesis-sta-engineer-high-speed-serdes-astera-labs/https://jobseveryhour.com/job/synthesis-sta-engineer-high-speed-serdes-astera-labs/Tue, 27 Oct 2026 00:00:00 +0000San Jose, California, United States. Perform RTL synthesis, driving area, power, and timing optimization for digital controller and DSP blocks within high-speed SerDes PHY designs. Author, develop, and validate SDC constraints from scratch, including clock definitions, generated clocks, multi-frequency/multi-mode constraints, I/O delays, false paths, multicycle paths, and clock-domain crossing exceptions unique to SerDes architectures. Set up and…https://jobseveryhour.com/job/senior-design-verification-engineer-astera-labs/https://jobseveryhour.com/job/senior-design-verification-engineer-astera-labs/Tue, 27 Oct 2026 00:00:00 +0000San Jose, California, United States. As a Senior Design Verification Engineer, you will help define and deliver robust verification for next-generation connectivity silicon that enables rack-scale AI infrastructure. You will partner closely with RTL, architecture, firmware, and post-silicon teams to build verification strategies that prove complex switching behavior across high-bandwidth protocols and demanding system environments. This role offers the…https://jobseveryhour.com/job/senior-embedded-software-engineer-pure-storage/https://jobseveryhour.com/job/senior-embedded-software-engineer-pure-storage/Mon, 26 Oct 2026 00:00:00 +0000Santa Clara, California. You will join Everpure’s Datastore team to design, develop, and validate embedded firmware for our DirectFlash™ modules. In this role, you will work across firmware and hardware boundaries to build reliable, high-performance storage solutions, while also developing virtual platforms and tooling that accelerate development, debugging, and validation. You will collaborate closely with cross-functional engineering…https://jobseveryhour.com/job/principal-verification-engineer-astera-labs/https://jobseveryhour.com/job/principal-verification-engineer-astera-labs/Mon, 26 Oct 2026 00:00:00 +0000San Jose, California, United States. Lead the functional verification of advanced ASICs, including test planning, development, execution, and coverage analysis. Collaborate closely with software and system validation teams to create and execute test plans on emulation platforms. Apply both directed and constrained-random verification techniques using SystemVerilog/UVM and other relevant tools. Debug test failures, analyze coverage results, and close…https://jobseveryhour.com/job/photonics-layout-engineer-psiquantum/https://jobseveryhour.com/job/photonics-layout-engineer-psiquantum/Mon, 26 Oct 2026 00:00:00 +0000Palo Alto, California. Quantum computing promises to solve many important problems that could never be solved on any conventional computer. At PsiQuantum, we’re building a general-purpose silicon photonic quantum computer to tackle these very problems. We are looking for an energetic, highly motivated Photonic Layout Engineer who will be responsible for the design, layout, and verification of photonic integrated circuits (PIC) for foundry…https://jobseveryhour.com/job/staff-engineer-rtl-design-ai-hardware-tenstorrent/https://jobseveryhour.com/job/staff-engineer-rtl-design-ai-hardware-tenstorrent/Mon, 26 Oct 2026 00:00:00 +0000Belgrade, Serbia. to work on challenging, high-impact designs in a fast-paced environment. This role is hybrid, based out of Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An engineer with a demonstrated depth in…https://jobseveryhour.com/job/director-silicon-logical-design-graphcore/https://jobseveryhour.com/job/director-silicon-logical-design-graphcore/Mon, 26 Oct 2026 00:00:00 +0000Bengaluru, India. Our team is at the forefront of the artificial intelligence revolution, enabling innovators from all industries and sectors to expand human potential with technology. The availability of specialised artificial intelligence compute will be a decisive factor in AI’s rate of progress. Graphcore allows innovators to go further, faster. What we do really makes a difference. We are looking for an experienced engineering…https://jobseveryhour.com/job/physical-design-team-lead-astera-labs/https://jobseveryhour.com/job/physical-design-team-lead-astera-labs/Sun, 25 Oct 2026 00:00:00 +0000Tel Aviv-Yafo, Tel Aviv District, Israel. Astera Labs is a hyper-growth connectivity company building the purpose-built silicon that powers rack-scale AI infrastructure. As a Principal Physical Design Engineer and Team Lead in Israel, you will lead physical design teams that take complex, high-speed mixed-signal and digital SoCs from RTL handoff through tapeout. You will set the technical direction, drive execution across multiple projects, and grow the…https://jobseveryhour.com/job/physical-design-engineering-director-astera-labs/https://jobseveryhour.com/job/physical-design-engineering-director-astera-labs/Fri, 23 Oct 2026 00:00:00 +0000Toronto, Ontario, Canada. Astera Labs is seeking a Physical Design Engineering Director to lead a team of physical design engineers at our Toronto site, driving the implementation of connectivity ASICs within our Signal Connectivity Group. This group is responsible for products that enable high-speed serial connectivity including PCIe retimers, Ethernet retimers, and signal conditioning solutions deployed across the world's largest AI…https://jobseveryhour.com/job/photonic-ic-design-engineer-design-automation-modeling-k2-space/https://jobseveryhour.com/job/photonic-ic-design-engineer-design-automation-modeling-k2-space/Fri, 23 Oct 2026 00:00:00 +0000Seattle, WA. K2's ambitions extend beyond the satellite bus. By designing and operating our own spacecraft and regularly manifesting hardware to orbit, K2 is uniquely positioned to develop, test, and deploy ambitious, “limit-of-physics” optical and photonic payloads across MEO, GEO, cislunar, and deep space on unprecedented timelines. The satellite bus is the platform – the payloads are the mission. As a Photonic IC Design…https://jobseveryhour.com/job/photonic-ic-design-engineer-chip-to-system-integration-k2-space/https://jobseveryhour.com/job/photonic-ic-design-engineer-chip-to-system-integration-k2-space/Fri, 23 Oct 2026 00:00:00 +0000Seattle, WA. K2's ambitions extend beyond the satellite bus. By designing and operating our own spacecraft and regularly manifesting hardware to orbit, K2 is uniquely positioned to develop, test, and deploy ambitious, “limit-of-physics” optical and photonic payloads across MEO, GEO, cislunar, and deep space on unprecedented timelines. The satellite bus is the platform – the payloads are the mission. As a Photonic IC Design…https://jobseveryhour.com/job/senior-photonics-test-automation-engineer-k2-space/https://jobseveryhour.com/job/senior-photonics-test-automation-engineer-k2-space/Fri, 23 Oct 2026 00:00:00 +0000Los Angeles, CA. K2's ambitions extend beyond the satellite bus. By designing and operating our own spacecraft and regularly manifesting hardware to orbit, K2 is uniquely positioned to develop, test, and deploy ambitious, “limit-of-physics” optical and photonic payloads across MEO, GEO, cislunar, and deep space on unprecedented timelines. The satellite bus is the platform – the payloads are the mission. As the first Photonics Test &…https://jobseveryhour.com/job/sr-ic-package-design-engineer-silicon-engineering-spacex/https://jobseveryhour.com/job/sr-ic-package-design-engineer-silicon-engineering-spacex/Fri, 23 Oct 2026 00:00:00 +0000Austin, TX. , you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. As an IC Package Design Engineer, you will be an integral part of the IC design team and lead packaging for custom in-house ASICs and RFICs for digital beam formers and modems…https://jobseveryhour.com/job/sr-ic-package-design-engineer-silicon-engineering-spacex-2/https://jobseveryhour.com/job/sr-ic-package-design-engineer-silicon-engineering-spacex-2/Fri, 23 Oct 2026 00:00:00 +0000Irvine, CA. , you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. As an IC Package Design Engineer, you will be an integral part of the IC design team and lead packaging for custom in-house ASICs and RFICs for digital beam formers and modems…