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Staff Analog Design Engineer, SerDes Clocking

D Matrix · Santa Clara
Hybrid$155K - $250KLead and abovePythonMATLABVerilog

Staff Analog Design Engineer, SerDes Clocking is open at D Matrix in Santa Clara (hybrid). The posting gives a salary of $155K - $250K. Posted on Aug 19, 2026, and still on D Matrix’s careers page when we last checked, on Nov 15, 2026.

About the role

This is a hands-on, transistor-level analog design role owning the clocking subsystem of d-Matrix's high-speed SerDes on our IO chiplet — including the PLL, DLL, phase interpolator, high-frequency clock distribution, and clock and data recovery (CDR) loop. This block set most often determines whether a link closes, and you will personally carry your designs from specification through silicon characterization. The…

The opening lines of the posting. The rest is on D Matrix’s careers page.

Hiring at D Matrix

D Matrix has 37 open roles right now, 2 of them remote. Most are in Engineering, People & Recruiting and Sales & Business Development. The median advertised salary across its roles with a published range is $222K. See all its roles

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