Senior DDR & Execution Validation Engineer is open at Graphcore in Bengaluru, India. Posted on Jun 17, 2026, and still on Graphcore’s careers page when we last checked, on Nov 14, 2026.
About the role
Reporting to the Memory Validation leadership team, the Senior Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms. The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform and systems teams to ensure robust memory…
The opening lines of the posting. The rest is on Graphcore’s careers page.
Hiring at Graphcore
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