RTL Design Engineer is open at Voltai.careers in Palo Alto Office. The posting gives no salary; similar roles in the United States advertise a median of $190K. Posted on Oct 19, 2026, and still on Voltai.careers’s careers page when we last checked, on Nov 15, 2026.
About the role
Own microarchitecture and RTL implementation for IP blocks and subsystems in SystemVerilog. - Drive designs through lint, CDC/RDC, synthesis, and timing closure with the backend team. - Partner with verification and formal teams on test plans, assertions, and coverage closure. - Debug complex functional and timing issues across simulation, emulation, and silicon. - Review and evaluate AI-generated RTL, and help…
The opening lines of the posting. The rest is on Voltai.careers’s careers page.
Hiring at Voltai.careers
Voltai.careers has 33 open roles right now, 2 of them remote. Most are in Engineering, Operations and Data & Research. See all its roles
