Principal Physical Design Engineer is open at Celero Communications, Inc. in San Jose, CA. The posting gives a salary of $150K - $250K. Posted on Sep 21, 2026, and still on Celero Communications, Inc.’s careers page when we last checked, on Nov 14, 2026.
About the role
, you will drive all aspects of the physical implementation flow, including floorplanning, power planning, place-and-route (P&R), clock tree synthesis, timing closure, and physical verification. You will collaborate closely with architecture, RTL, circuit design, and verification teams to deliver high-performance chips that meet aggressive targets for performance, power, area (PPA), signal integrity, and…
The opening lines of the posting. The rest is on Celero Communications, Inc.’s careers page.
Hiring at Celero Communications, Inc.
Celero Communications, Inc. has 26 open roles right now. Most are in Engineering, Marketing & Community and Operations. The median advertised salary across its roles with a published range is $200K. See all its roles
