Power Optimization Engineer is open at Etched in Cupertino, CA. The posting gives no salary; similar roles in the United States advertise a median of $200K. Posted on Jan 17, 2025, and still on Etched’s careers page when we last checked, on Nov 14, 2026.
About the role
Develop chip power model from chip architecture, estimate chip power from microarchitecture, and devise power saving techniques for product use cases. Work closely with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to implement design for optimal power using advanced power management techniques. Estiate and analyze power consumption data at both full-chip and…
The opening lines of the posting. The rest is on Etched’s careers page.
Hiring at Etched
Etched has 25 open roles right now. Most are in Engineering, Operations and Finance & Trading. See all its roles
