Low-Power Design Engineer is open at Voltai.careers in Palo Alto Office. The posting gives no salary; similar roles in the United States advertise a median of $190K. Posted on Oct 19, 2026, and still on Voltai.careers’s careers page when we last checked, on Nov 15, 2026.
About the role
Define power architecture and write UPF power intent for SoCs and IP. - Implement and verify power gating, clock gating, multi-voltage domains, and retention. - Run power-aware simulation, static low-power checks, and CDC/RDC analysis. - Partner with RTL, physical design, and signoff teams on power estimation and closure. - Build automation for power analysis and reporting. - Evaluate AI-generated power intent and…
The opening lines of the posting. The rest is on Voltai.careers’s careers page.
Hiring at Voltai.careers
Voltai.careers has 33 open roles right now, 2 of them remote. Most are in Engineering, Operations and Data & Research. See all its roles
